WTS701EF WINBOND [Winbond], WTS701EF Datasheet - Page 9
![no-image](/images/no-image-200.jpg)
WTS701EF
Manufacturer Part Number
WTS701EF
Description
WINBOND SINGLE-CHIP TEXT-TO-SPEECH PROCESSOR
Manufacturer
WINBOND [Winbond]
Datasheet
1.WTS701EF.pdf
(77 pages)
- Current page: 9 of 77
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6. PIN DESCRIPTION
PIN NO.
2,36,44
9,10
11,12
13
14
15
16
25
26
3
4
5
6
7
8
SYMBOL
XTAL2
XTAL1
VCCD
VSSD
VSSA
SCLK
MISO
MOSI
VCLK
VDX
VFS
R/ B
INT
SS
CS
Table 1. WTS701 Pin Signal Assignment.
I/O
G
O
O
O
G
O
O
P
I
I
I
I
I
I
I
Analog Ground pins.
CODEC master clock
CODEC frame synchronization signal
CODEC data output. This pin puts data out in the linear PCM
unsigned or 2’s complement format. It is tri-stated until the user
requests a CONVERT operation.
SPI Master In, Slave Out pin. Serial data line used to
communicate with SPI master. Pin is tri-state when SS =1.
CRYSTAL 2: This is the crystal oscillator output. It is the
inversion of XTAL1.
CRYSTAL 1: This is the crystal oscillator input. This pin may be
driven by an external clock. The clock to the WTS701 processor
is configured by a clock configuration register, which is set by the
host processor during the initialization phase.
Digital Ground pin.
Positive Digital Voltage Supply pin. These pins carry noise
generated by internal clocks in the chip. They must be
independently bypassed to Digital Ground to ensure correct
device operation and not connected together.
Interrupt Output; an open drain output that indicates that the
device wishes an interrupt service. The device can request an
interrupt when it finishes an operation or needs more data to
process. Under what conditions the device generates an
interrupt can be configured through the user configuration
registers. This pin remains LOW until a Read Interrupt command
is executed.
SPI Master Out, Slave In. Serial data input from Master and
Open Drain
SPI Slave Select input. This is an active LOW input used to
select the device to respond to an SPI transaction.
SPI Serial clock input.
Chip Select (active LOW) Pin must be LOW to access WTS701
device.
Ready/busy signal; This pin defaults HIGH indicating the device
is ready for data transfer. The pin is driven LOW to handshake a
pause in SPI data transfer and Open Drain.
- 9 -
FUNCTION
Publication Release Date: May 2003
WTS701
Revision 3.09
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