ADL5365-EVALZ AD [Analog Devices], ADL5365-EVALZ Datasheet - Page 19

• Manufacturer Part Number: ADL5365-EVALZ
• Description: 1200 MHz to 2500 MHz Balanced Mixer, LO Buffer and RF Balun
• Manufacturer: AD [Analog Devices]

APPLICATIONS INFORMATION
BASIC CONNECTIONS
The ADL5365 mixer is designed to up- or downconvert
between radio frequencies (RF) from 1200 MHz to 2500 MHz and
intermediate frequencies (IF) from dc to 450 MHz. Figure 50
depicts the basic connections of the mixer. It is recommended to
ac-couple RF and LO input ports to prevent non-zero dc voltages
from damaging the RF balun or LO input circuit. The RFIN
capacitor value of 3 pF is recommended to provide the optimized
RF input return loss for the desired frequency band.
For upconversion, the IF input, Pin 18 (IFON) and Pin 19
(IFOP), must be driven differentially or by using a 1:1 ratio
transformer for single-ended operation. A 3 pF capacitor is
recommended for the RF output, Pin 2 (RFIN).
IF PORT
The real part of the output impedance is approximately 50 Ω, as
seen in Figure 26, which matches many commonly used SAW
filters without the need for a transformer. This results in a voltage
conversion loss that is approximately the same as the power
conversion loss, as shown in Table 3.
+5V
0.01µF
4.7µF
RF-IN
+5V
10pF
3pF
10pF
+5V
1
2
3
4
5
6
20
10pF
Figure 50. Typical Application Circuit
IF1_OUT
560pF
C25
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GENERATOR
7
T1
R
BIAS LO
BIAS
560pF
C24
18
8
10pF
BIAS RESISTOR SELECTION
An external resistor, R
of the integrated amplifiers at the LO terminals. It is necessary
to have a sufficient amount of current to bias the internal LO
amplifier to optimize dc current vs. optimum IIP3 performance.
Figure 37 and Figure 39 provide the reference for the bias resistor
selection when lower power consumption is considered at the
expense of conversion gain and IP3 performance.
MIXER VGS CONTROL DAC
The ADL5365 features two logic control pins, Pin 12 (VGS0)
and Pin 13 (VGS1), that allow programmability for internal
gate-to-source voltages for optimizing mixer performance over
desired frequency bands. The evaluation board defaults both
VGS0 and VGS1 to ground. Power conversion loss, NF, and
IIP3 can be optimized, as shown in Figure 35 and Figure 36.
R1
0Ω
ADL5365
17
9
10kΩ
10kΩ
16
10
15
14
13
12
11
BIAS LO
22pF
22pF
, is used to adjust the bias current
10pF
LO2_IN
+5V
LO1_IN
ADL5365