LT5526 LINER [Linear Technology], LT5526 Datasheet - Page 11

• Manufacturer Part Number: LT5526
• Description: High Linearity, Low Power Downconverting Mixer
• Manufacturer: LINER [Linear Technology]

APPLICATIO S I FOR ATIO
The purpose of L5 is to provide a DC return path for Pin 3.
(Another possible placement for L5 would be across Pins
2 and 3, thus using L1 as part of the DC return path.) The
inductance and resonant frequency of L5 should be large
enough that they don’t significantly affect the input imped-
ance and performance of the balun. Either multilayer or
wire-wound inductors may be used.
The impact of L5 on input matching can be reduced by
adding a capacitor in parallel with it. In this case, the
capacitor value should be the same as C7 and C9, while L5
should have the same value as L1 and L4.
Table 2. Component Values for Lumped Balun on RF Input
LO Input Port
The LO buffer amplifier consists of high speed limiting
differential amplifiers designed to drive the mixer core for
high linearity. The LO
ended drive, though differential drive can be used if de-
sired. The LO input is internally matched to 50Ω; however,
external DC blocking capacitors are required because the
LO pins are internally biased to approximately 1.7V DC. A
simplified schematic for the LO input is shown in Figure 7.
FREQUENCY
LO
50Ω
(MHz)
1100
240
380
680
900
IN
100pF
100pF
C5
C6
Figure 7. LO Input Schematic
L (nH)
14
15
6.8
6.8
3.9
27
15
U
LO
LO
+
V
–
+
CC
and LO
U
C (pF)
4.7
3.9
2.7
18
10
–
pins are designed for single-
W
L5 (nH)
50Ω
100
100
47
18
15
BANDWIDTH
U
LT5526
(MHz)
100
130
215
230
230
5526 F07
External 100pF DC blocking capacitors provide a broad-
band match from about 110MHz to 2.7GHz, as shown in
the plot of return loss vs frequency in Figure 8. The LO
input match can be improved at lower frequencies by
increasing the values of C5 and C6.
Table 3. Single-Ended LO Input Impedance
IF Output Port
A simplified schematic of the IF output circuit is shown in
Figure 9. The output pins, IF
connected to the collectors of the mixer switching transis-
tors. Both pins must be biased at the supply voltage, which
can be applied through the center-tap of a transformer or
FREQUENCY
(MHz)
1000
1200
1400
1600
1800
400
600
800
–10
–15
–20
–25
–30
–5
Figure 8. Typical LO Input Return Loss
with 100pF DC Blocking Capacitors
0
0
IMPEDANCE
63.4 – j12.0
61.6 – j8.38
61.8 – j6.86
62.4 – j7.09
62.8 – j8.32
62.6 – j10.3
61.9 – j12.6
60.5 – j14.4
500
INPUT
FREQUENCY (MHz)
1000
1500
+
REFLECTION COEFFICIENT
and IF
0.158
0.128
0.122
0.127
0.135
0.144
0.154
0.160
MAG
2000
5526 F08
–
, are internally
2500
LT5526
ANGLE
–35.8
–31.5
–26.6
–26.1
–28.8
–34.0
–40.3
–46.2
11
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