ADL5502-EVALZ AD [Analog Devices], ADL5502-EVALZ Datasheet - Page 12

• Manufacturer Part Number: ADL5502-EVALZ
• Description: 800 MHz to 3800 MHz Crest Factor Detector
• Manufacturer: AD [Analog Devices]

ADL5502
Table 4. Evaluation Board Configuration Options
Component
VPOS, GND
C13, C14
C17
R10, C15, C16
R3, R6, R11,
R12, C18, C19
R1, SW1
R7, R8, R13,
C20, SW2
R2, R4, R5, R9,
C11, C12
Description
Ground and Supply Vector Pins.
Power Supply Decoupling. Nominal supply decoupling of 0.01 μF and 100 pF.
Filter Capacitor. The internal rms averaging capacitor can be augmented by placing
additional capacitance in C17.
RF Input interface. The 75 Ω resistor at R10 combines with the ADL5502 internal input
impedance to give a broadband input impedance of around 50 Ω. The pads for
components C15, C16, and R10 can be used for more precise matching at a particular
frequency.
Output Filtering. The combination of the internal 100 Ω output resistance and C18 produce
a low-pass filter to reduce output ripple of the VRMS output. Similarly, C19 and the internal
100 Ω output resistance will form a low-pass filter to at the VPK/ENV output. Either output
can be scaled down using the resistor divider pads, R3, R11, R6, and R12. Note that a
minimum of 4.7 nF capacitive load should be kept on the RMS output.
Device Enable. When the switch is set towards the “SW1” label, the ENBL pin is grounded (through
the 0 Ω resistor) putting the device in power-down mode. In the opposite switch position, the
ENBL pin is connected to VPOS and the ADL5502 is in operating mode. While the switch is in the
disabled position, the ENBL pin can be driven by a signal generator via the SMA labeled ENBL. In
this case, R1 must be removed or changed to provide a 50 Ω match.
Control Interface. When the switch is set towards the “SW2” label, the PK/ENV pin is grounded
(through a 10 kΩ resistor) putting the device in peak-hold mode. In the opposite switch position,
the pin is connected to VPOS (through a 10 kΩ resistor) and the ADL5502 is in envelope-tracking
mode. While the switch is in the peak-hold position, the PK/ENV pin can be driven by a signal
generator via the SMA labeled CNTL. In this case, R8 may be removed or changed to provide a
50 Ω match. R13 and C20 allow for low-pass filter design for the control pin.
Alternate Interface. The end connector, P1, allows access to various ADL5502 signals. These
signal paths are only used during factory test and characterization.
Rev. PrD (04/20/2008) | Page 12 of 14
Preliminary Technical Data
R2, R4, R5, R9 = 0 Ω (Size
C11 = 0.1 μF (Size 0402)
C12 = 100 pF (Size 0402)
Default Condition
Not Applicable
C13 = 0.1 μF (Size 0402)
C14 = 100 pF (Size 0402)
C17 = Open (Size 0402)
R10 = 75 Ω (Size 0402)
C15, C16 = 0 Ω (Size 0402)
R11, R12 = Open (Size
R3, R6 = 0 Ω (Size 0402)
C18 = 4.7 nF (Size 0402)
C19 = Open (Size 0402)
R1 = 0 Ω (Size 0402)
SW1 = away from “SW1”
label
R7, R8 = 10 kΩ (Size 0402)
R13 = 0 Ω (Size 0402)
C20 = Open (Size 0402)
SW2 = away from “SW1”
label
0402)
0402)