AD8200YCSURF AD [Analog Devices], AD8200YCSURF Datasheet - Page 8

• Manufacturer Part Number: AD8200YCSURF
• Description: High Common-Mode Voltage, Single-Supply Difference Amplifier
• Manufacturer: AD [Analog Devices]

AD8200
HIGH-LINE CURRENT SENSING WITH LPF AND GAIN
ADJUSTMENT
Figure 11 is another refinement of Figure 1, including gain
adjustment and low-pass filtering.
Figure 11. High-Line Current Sensor Interface; Gain = × 40,
Single-Pole, Low-Pass Filter
A power device that is either ON or OFF controls the current in
the load. The average current is proportional to the duty cycle of
the input pulse and is sensed by a small value resistor. The
average differential voltage across the shunt is typically 100 mV,
although its peak value will be higher by an amount that depends
on the inductance of the load and the control frequency. The
common-mode voltage, on the other hand, extends from roughly
1 V above ground, when the switch is ON, to about 1.5 V
above the battery voltage, when the device is OFF, and the
clamp diode conducts. If the maximum battery voltage spikes
up to 20 V, the common-mode voltage at the input can be as
high as 21.5 V.
To produce a full-scale output of 4 V, a gain ×40 is used, adjust-
able by ± 5% to absorb the tolerance in the shunt. There is
sufficient headroom to allow 10% overrange (to 4.4 V). The
roughly triangular voltage across the sense resistor is averaged
by a 1-pole, low-pass filter, here set with a corner frequency =
3.6 Hz, which provides about 30 dB of attenuation at 100 Hz. A
higher rate of attenuation can be obtained using a 2-pole filter
having f
uses two separate capacitors, the total capacitance is less than
half that needed for the 1-pole filter.
BATTERY
BATTERY
Figure 12. Illustration of 2-Pole Low-Pass Filtering
C
= 20 Hz, as shown in Figure 12. Although this circuit
CLAMP
NC = NO CONNECT
NC = NO CONNECT
14V
DIODE
14V
CLAMP
DIODE
POWER
DEVICE
4 TERM
POWER
DEVICE
SHUNT
4 TERM
SHUNT
INDUCTIVE
LOAD
COMMON
INDUCTIVE
LOAD
COMMON
+IN
–IN
+IN
–IN
AD8200
GND
NC
AD8200
GND
NC
+V
5V
A1
S
+V
5V
A1
C
S
OUT
F
(0.05 F FOR f
C
A2
5% CALIBRATION RANGE
F
(0.22 F FOR f = 3.6 Hz)
C
OUT
127k
C
A2
= 1Hz– F
= 0.796Hz– F
V
NULL
OS/IB
C
C
191k
20k
432k
50k
= 20Hz)
OUTPUT
4V/AMP
OUTPUT
–8–
DRIVING CHARGE REDISTRIBUTION A/D
CONVERTERS
When driving CMOS ADCs, such as those embedded in
popular microcontrollers, the charge injection ( Q) can cause
a significant deflection in the output voltage of the AD8200.
Though generally of short duration, this deflection may persist
until after the sample period of the ADC has expired, due to the
relatively high open-loop output impedance of the AD8200.
Including an R-C network in the output can significantly reduce
the effect. The capacitor helps to absorb the transient charge,
effectively lowering the high frequency output impedance of the
AD8200. For these applications, the output signal should be
taken from the midpoint of the R
shown in Figure 13.
Since the perturbations from the analog-to-digital converter are
small, the output impedance of the AD8200 will appear to be
low. The transient response will, therefore, have a time constant
governed by the product of the two LAG components, C
R
programmed at approximately 10 µs. Therefore, if samples are
taken at several tens of microseconds or more, there will be
negligible charge “stack-up.”
Figure 13. Recommended Circuit for Driving CMOS A /D
LAG
. For the values shown in Figure 13, this time constant is
+IN
–IN
5V
A2
10k
10k
AD8200
R
1k
LAG
0.01 F
C
LAG
LAG
– C
LAG
MICROPROCESSOR
combination as
A/D
REV. B
LAG
×