ADL5521ACPZ-WP AD [Analog Devices], ADL5521ACPZ-WP Datasheet - Page 34

• Manufacturer Part Number: ADL5521ACPZ-WP
• Description: 400 MHz - 4000 MHz Low Noise Amplifier
• Manufacturer: AD [Analog Devices]

ADL5521
The ADL5521 and ADL5523 are monolithic LNAs in a 3x3mm
LFCSP package. The eval board, as shipped from the factory,
should give a noise figure of 0.9dB over a bandwidth of several
hundred MHz. The specific frequency where optimal noise is
reached depends on the tuning.
The bandwidth of the ADL5521 is 400MHz to 4GHz, although
noise figure will degrade above 2.5GHz as the gain begins to roll
off.
Note – The factory eval board has a bias resistor on the LNA of
3.3K Ω. If this bias resistor is increased to 5.2K Ω, the optimal
noise figure will drop to 0.8dB, but the tradeoff is that the OIP3
will typically drop from 35 to 33dB. The change in S parameters
will be insignificant when changing bias resistors, so this section
will only take into account measurements done with 3.3K Ω bias
resistor.
Contents of this note are based completely on lab measurements.
Although there are plots in which the Agilent ADS environment is
used, the data in these plots comes completely from lab
measurements.
Tuning S22
Tuning of the LNA begins with S22 (output tuning). Tuning of the
LNA output is done by placing reactive components on the bias
line, referred to in the schematics in Figure 88 as VPOS.
On the LNA eval board, S22 tuning is achieved by either the use of
an inductor (L2) on the bias line, or a shunt cap C3) on the bias
line to ground. Typically, either L2 is required, or C3, but not
both.
The evaluation board uses a ‘slider’ on the bias line in order to
make tuning for S22 as easy as possible. The slider is an area of
ground etch adjacent to the bias line that is clear of solder mask.
The bias line in this area is also free of solder mask. This allows a
capacitor (C3) to be placed anywhere on the bias line to ground
and so provides easy, very accurate tuning for S22.
Note that the PCB layout shows two capacitors, C3 and C4.
Typically only one of these is needed for good S22 tuning.
TUNING THE ADL5521/23 EVAL BOARD FOR OPTIMAL NOISE FIGURE
Rev. PrC| Page 34 of 45
The slider can be seen in the LNA PCB layout in Figure 117 as the
red area to the right of the bias line. With a 0 Ω jumper in place of
L2, moving a 1nF capacitor from the top to the bottom effectively
tunes S22 from 1400 MHz to 3500MHz. Table 7 shows the
component values and placement required for S22 tuning from
800MHz to 3200MHz. For lower frequencies, higher values of L2
can be used to tune S22, and for frequencies from 3.2GHx to
4.0GHz, smaller values of capacitors can be used on the slider.
The results for S22 tuned for different frequencies are shown in
Figure 118 to Figure 123.
Table 7. Capacitor and Inductor Tuning and Placement for LNA S22 Tuning
Frequency
(MHz)
1400
2000
2400
2800
3200
800
L2 (nH)
Preliminary Technical Data
0 Ω
0 Ω
0 Ω
0 Ω
0 Ω
3.4
C3 (nF)
Open
Open
1nF
1nF
1nf
1nf
Placement
C3
A
D
B
C