MCP65R41T-1202E MICROCHIP [Microchip Technology], MCP65R41T-1202E Datasheet - Page 21

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MCP65R41T-1202E

Manufacturer Part Number
MCP65R41T-1202E
Description
3 uA Comparator with Integrated Reference Voltage
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet

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4.0
The MCP65R41/6 family of Push-Pull and Open-Drain
output comparators are fabricated on Microchip’s state-
of-the-art CMOS process. They are suitable for a wide
range of high-speed applications requiring low power
consumption.
4.1
4.1.1
The input stage of this family of devices uses three
differential input stages in parallel: one operates at low
input voltages, one at high input voltages, and one at
mid input voltages. With this topology, the input voltage
range is 0.3V above V
providing low offset voltage throughout the Common
mode range. The input offset voltage is measured at
both V
operation.
The MCP65R41/6 family has internally-set hysteresis
V
accuracy, and large enough to eliminate the output
chattering caused by the comparator’s own input noise
voltage
offset voltage (V
(input-referred) low-high and high-low trip points. Input
hysteresis voltage (V
the same trip points.
FIGURE 4-1:
Comparators’ Internal Hysteresis Eliminates
Output Chatter Caused by Input Noise Voltage.
 2010 Microchip Technology Inc.
HYST
-1
-2
-3
9
8
7
6
5
4
3
2
1
0
SS
that is small enough to maintain input offset
0
E
APPLICATIONS INFORMATION
Comparator Inputs
V
NI
DD
- 0.3V and V
.
NORMAL OPERATION
V
= 5.0V
100
OUT
Figure 4-1
2 00
OS
300
) is the center (average) of the
Time (100 ms/div)
HYST
The MCP65R41/6
DD
40 0
DD
depicts this behavior. Input
) is the difference between
and 0.3V below V
500
+ 0.3V to ensure proper
Hysteresis
600
V
IN
-
700
800
900
SS
, while
10 00
30
25
20
15
10
5
0
-5
-10
-15
-20
-25
-30
4.1.2
The ESD protection on the inputs can be depicted as
shown in
protect the input transistors, and to minimize the input
bias current (I
inputs when trying to go more than one diode drop
below V
far above V
to allow a normal operation, and low enough to bypass
the ESD events within the specified limits.
FIGURE 4-2:
Structures.
In order to prevent damage and/or improper operation
of these comparators, the circuit they are connected to
limit the currents (and voltages) at the V
pins (see
shows the recommended approach to protect these
inputs. The internal ESD diodes prevent the input pins
(V
the resistors R
out of the input pin. Diodes D
pin (V
When implemented as shown, resistors R
limit the current through D
FIGURE 4-3:
Inputs.
* Pull-up resistor required for the MCP65R46 only.
IN
V
V
+ and V
V
1
2
V
V
IN
IN
DD
SS
R
R
+
SS
+ and V
1
2
Absolute Maximum
. They also clamp any voltages that go too
Figure
R
R
Bond
Bond
Bond
DD
INPUT VOLTAGE AND CURRENT
LIMITS
Pad
Pad
Pad
IN
1
2
D
V
V
–) from going too far below ground, and
; their breakdown voltage is high enough
1
1
SS
SS
B
D
and R
). The input ESD diodes clamp the
IN
2
– (minimum expected V
– (minimum expected V
4-2. This structure was chosen to
–) from going too far above V
MCP65R41/6
2
Simplified Analog Input ESD
Protecting the Analog
limit the possible current drawn
Stage
Input
2 mA
2 mA
+
1
and D
R
1
V
3
and D
DD
Ratings†).
2
.
2
DS22269A-page 21
V
Bond
prevent the input
Pad
PU
R
IN
1
1
2
)
)
PU
and R
+ and V
Figure 4-3
*
V
V
OUT
IN
2
also
DD
IN
.

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