U2739M-BFC ATMEL [ATMEL Corporation], U2739M-BFC Datasheet - Page 24

• Manufacturer Part Number: U2739M-BFC
• Description: DAB One-Chip Channel- and Source Decoder
• Manufacturer: ATMEL [ATMEL Corporation]

6.8
6.8.1
6.8.2
The I2S interface is a standard continuous audio interface
consisting of bit clock (_CLK), word select (_WIN) and
data (_DAT) lines. The word select line indicates the
transmitted channel: LOW for left, HIGH for right. Please
be aware of the 1 cycle delay of the data word MSB
corresponding to the I2S_WIN edge !
6.8.3
6.8.4
6.8.5
U2739M-B
24 (69)
I2S clock period
I2S clock high
I2S clock low
I2S_WIN output delay
I2S_DAT output delay
I2S_CLK
I2S_WIN
I2S_DAT
QFP144 QFP100
QFP144 QFP100
79
80
82
77
Audio Interfaces
I2S Interface Signal Description
I2S Interface Description
I2S Interface Timing Diagram
I2S Interface Timing Parameter
SP-DIF Interface Signal Description
td1
0
56
57
58
54
15
td2
Parameter
14
I2S_CLK
I2S_DAT
I2S_WIN
SPDIF
tH
tclk
Pin Name
tL
13
Pin Name
12
left sample
Figure 13. I2S interface timing diagram
3
I2S clock line
I2S data line
I2S window line
2
SPDIF output
1
Signal Description
0
Signal Description
Symbol
tclk
15
td1
td2
tH
tL
As in the DAB system the I2S_WIN clock is fixed as
48 kHz (MPEG1) or 24 kHz (MPEG2) the bit clock
depends on the data word length. The standard word
length is 16 bit, hence the bit clock is fixed at 1.536 MHz
resp. 768 kHz.
14
13
Min.
–5.0
–5.0
12
right sample
3
16.28
14.28
14.28
Typ.
0.0
0.0
PRO04T
PRO04T
PRO04T
PRO04T
Pad Type
2
Pad Type
1
0
Max.
5.0
5.0
Rev. A1, 22-May-01
15
Dir.
Dir.
out
out
out
out
14
13
5 V Tol.
5 V Tol.
Unit
us
us
us
ns
ns
12