74ACT NSC [National Semiconductor], 74ACT Datasheet - Page 2

• Manufacturer Part Number: 74ACT
• Description: 9-Bit D Flip-Flop
• Manufacturer: NSC [National Semiconductor]

Functional Description
The ’ACT823 consists of nine D-type edge-triggered flip-
flops These have TRI-STATE outputs for bus systems or-
ganized with inputs and outputs on opposite sides The buff-
ered clock (CP) and buffered Output Enable (OE) are com-
mon to all flip-flops The flip-flops will store the state of their
individual D inputs that meet the setup and hold time re-
quirements on the LOW-to-HIGH CP transition With OE
LOW the contents of the flip-flops are available at the out-
puts When OE is HIGH the outputs go to the high imped-
ance state Operation of the OE input does not affect
H
L
X
Z
NC
Logic Diagram
e
e
e
e
e
OE
e
LOW Voltage Level
Immaterial
High Impedance
HIGH Voltage Level
H
H
H
H
H
H
L
L
L
L
No Change
LOW-to-HIGH Transition
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays
CLR
X
X
H
H
H
H
H
H
L
L
Inputs
EN
X
X
H
H
L
L
L
L
L
L
CP
X
X
X
X
Function Table
D
H
X
X
X
X
H
H
L
L
L
Internal
NC
NC
Q
H
H
H
L
L
L
L
L
2
the state of the flip-flops In addition to the Clock and Output
Enable pins there are Clear (CLR) and Clock Enable (EN)
pins These devices are ideal for parity bus interfacing in
high performance systems
When CLR is LOW and OE is LOW the outputs are LOW
When CLR is HIGH data can be entered into the flip-flops
When EN is LOW data on the inputs is transferred to the
outputs on the LOW-to-HIGH clock transition When the EN
is HIGH the outputs do not change state regardless of the
data or clock input transitions
Output
NC
O
H
Z
Z
Z
L
Z
Z
Z
L
Function
High Z
High Z
Clear
Clear
Hold
Hold
Load
Load
Load
Load
TL F 9894– 5