ML6431CH MICRO-LINEAR [Micro Linear Corporation], ML6431CH Datasheet - Page 3

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ML6431CH

Manufacturer Part Number
ML6431CH
Description
Genlocking Sync Generator with Digital Audio Clock for NTSC, PAL & VGA
Manufacturer
MICRO-LINEAR [Micro Linear Corporation]
Datasheet

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ML6431CH
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PIN DESCRIPTION
PIN
1
2
3
4
5
6
7
8
9
10
11
12
NAME
P2/S
P3/S
SLEEP/54MHz
V
GND S
CV
CV
V
V
GND A
XTAL
XTAL
CC
CC
SYNC
IN
REF
DATA
CLK
S
A
/H
IN
OUT
SYNC
FUNCTION
This is a dual function pin. If presets
are enabled, refer to Table 7. If presets
are disabled, serial bus data input.
This is a dual function pin. If presets
are enabled, refer to Table 7. If presets
are disabled, serial bus clock input.
Hardware sleep mode: when low,
disables entire chip for ultra-low
power dissipation. Sleep mode can
also be enabled/disabled via serial bus
(Register 8). 54MHz is a clock input.
This can be any 4X clock up to
70MHz used for pulse generation.
Analog supply for sync separator.
Analog ground for sync separator.
Composite video input; video input in
typical composite video applications,
or Y input for YUV applications, or G
input for RGB applications with sync
on green. For typical VGA or other
high performance display applica-
tions, this input may be supplied with
a TTL level H
vertical sync input supplied with a TTL
level V
Reference voltage for internal sync
slicer. The external capacitor is driven
by a charge pump to follow the sync
tip.
Vertical input for non-composite
sources. This input may be supplied
with a TTL level V
composite inputs this pin is tied high
or low.
Analog supply pin for analog PLL.
Analog ground for analog PLL.
Crystal may be parallel tuned 3.58
MHz or 4.43MHz, or may be driven
by an external oscillator at these
frequencies, or at 4x these
frequencies.
Crystal drive pin. No connect if using
external oscillator or clock.
SYNC
(NOTE: ML6430 and ML6431 pin functions are identical except for pin 16. See below)
signal.
SYNC
SYNC
signal and the
signal. For
PIN
13
14
15
16
16
22
17
18
19
20
21
NAME
FREERUN
NOSIGNAL Indicates video signal activity has not
LOCKED
(ML6430) AUDIOCLK
(ML6431) AUDIOCLK/PHERROUT
FIELD ID
2X CLOCK 2X oversampled PIXEL CLOCK &
1X CLOCK/4X CLOCK
GND B
V
F
RESET
CC
B
FUNCTION
Forces the PLL to run at a selected
standard without syncing to a video
signal. Accuracy is ±20ppm in
FREERUN with ideal crystal, otherwise
locked to video source
been detected at the composite input.
If NOSIGNAL = low, this condition
does not imply that lock has been
established. The NOSIGNAL pin can
be tied to FREERUN to create a local
loop in which the genlock will not try
to lock until a signal is detected at the
input.
Indicates when digital PLL is locked to
incoming video signal.
Digital audio clock output.
Programmable for 32kHz, 44.1kHz or
48kHz output.
This is a dual mode pin. Pin is selected
via serial bus (Register 7). AUDIOCLK
is an audio clock signal (see Table 9).
PHERROUT indicates whether
incoming HSYNC is ahead or behind
output HSYNC.
Field Flag: Odd = 1, Even = 0
Output of Digital PLL. Nominal
frequency of 27MHz
1X pixel clock. Nominal frequency
of 13.5MHz or 54MHz ±20ppm in
FREERUN with ideal crystal, otherwise
locked to video source. PAL 4X CLOCK
not available (no 4x4.4336MHz clock).
Digital ground for output driver
buffers.
Digital supply for output driver buffers.
Frame reset; active low for one half
line at the high to low transition of
field ID. In NTSC mode, FRESET goes
low on the high-to-low transition on
the Field ID pin and at the beginning
of line 1 (see Figure 2). In PAL mode,
FRESET goes low on the high-to-low
transition on the Field ID pin and at
the end of line 310 (see Figure 3).
ML6430/ML6431
3

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