74AC899QCQB NSC [National Semiconductor], 74AC899QCQB Datasheet - Page 2

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74AC899QCQB

Manufacturer Part Number
74AC899QCQB
Description
9-Bit Latchable Transceiver with Parity Generator/Checker
Manufacturer
NSC [National Semiconductor]
Datasheet
H
L
X
Note 1 O E
GAB GBA SEL LEA LEB
e
e
e
A
B
APAR BPAR
ODD EVEN
GBA GAB
SEL
LEA LEB
ERRA ERRB
H
H
H
H
H
H
L
L
L
L
L
Pin Names
0
0
LOW Voltage Level
Immaterial
HIGH Voltage Level
–A
–B
7
7
H
H
H
H
H
H
L
L
L
L
L
e
ODD EVEN
Inputs
X
H
H
H
H
L
L
L
L
L
L
A Bus Data Inputs Data Outputs
B Bus Data Inputs Data Outputs
A and B Bus Parity Inputs
ODD EVEN Parity Select Active
LOW for EVEN Parity
Output Enables for A or B Bus
Active LOW
Select Pin for Feed-Through or
Generate Mode LOW for Generate
Mode
Latch Enables for A and B Latches
HIGH for Transparent Mode
Error Signals for Checking
Generated Parity with Parity In
LOW if Error Occurs
X
H
X
X
H
H
H
H
H
L
L
H
H
H
H
H
H
X
L
L
X
L
Description
Busses A and B are TRI-STATE
Generates parity from B 0 7 based on O E (Note 1) Generated parity
ERRB
Generates parity from B 0 7 based on O E Generated parity
APAR Generated parity checked against BPAR and output as ERRB
Generated parity also fed back through the A latch for generate check
as ERRA
Generates parity from B latch data based on O E Generated parity
output as ERRB
BPAR B 0 7
checked against BPAR and output as ERRB
BPAR B 0 7
Feed-through mode Generated parity checked against BPAR and
output as ERRB Generated parity also fed back through the A latch for
generate check as ERRA
Generates parity for A 0 7 based on O E Generated parity
BPAR Generated parity checked against APAR and output as ERRA
Generates parity from A 0 7 based on O E Generated parity
BPAR Generated parity checked against APAR and output as ERRA
Generated parity also fed back through the B latch for generate check
as ERRB
Generates parity from A latch data based on O E Generated parity
output as ERRA
APAR A 0 7
Feed-through mode Generated parity checked against APAR and
output as ERRA
APAR A 0 7
Feed-through mode Generated parity checked against APAR and
output as ERRA Generated parity also fed back through the B latch for
generate check as ERRB
APAR Generated parity checked against BPAR and output as
APAR Generated parity checked against latched BPAR and
BPAR Generated parity checked against latched APAR and
Function Table
APAR A0 7 Feed-through mode Generated parity
APAR A 0 7
BPAR B 0 7
BPAR B 0 7
2
Operation
Functional Description
The ’AC ’ACT899 has three principal modes of operation
which are outlined below These modes apply to both the A-
to-B and B-to-A directions
Bus A (B) communicates to Bus B (A) parity is generat-
ed and passed on to the B (A) Bus as BPAR (APAR) If
LEB (LEA) is HIGH and the Mode Select (SEL) is LOW
the parity generated from B 0 7
checked and monitored by ERRB (ERRA)
Bus A (B) communicates to Bus B (A) in a feed-through
mode if SEL is HIGH Parity is still generated and
checked as ERRA and ERRB in the feed-through mode
(can be used as an interrupt to signal a data parity bit
error to the CPU)
Independent Latch Enables (LEA and LEB) allow other
permutations of generating checking (see Function Ta-
ble below)
(A 0 7 ) can be

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