HD151BF854_06 RENESAS [Renesas Technology Corp], HD151BF854_06 Datasheet - Page 3

• Manufacturer Part Number: HD151BF854_06
• Description: 2.5 V PLL Clock Buffer for DDR Applicationjpeg
• Manufacturer: RENESAS [Renesas Technology Corp]

HD151BF854
Logic Diagram
Absolute Maximum Ratings
Supply voltage
Input voltage
Output voltage *
Input clamp current
Output clamp current
Continuous output current
Maximum power dissipation
at Ta = 55°C (in still air)
Storage temperature
Notes:
Rev.5.00 Apr 07, 2006 page 3 of 7
1. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device.
These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those indicated under “recommended operating conditions” is not implied. Exposure to absolute maximum
rated conditions for extended periods may affect device reliability.
are observed.
1
CLKIN
AV
FBIN
Item
Note: All inputs and outputs are associated with V
DD
10
20
8
Symbol
Logic
VDD
Test
PLL
T
V
V
I
I
V
I
OK
IK
stg
O
IC
O
I
–0.5 to VDD+0.5
–0.5 to VDD+0.5
–65 to +150
–0.5 to 3.6
–0.5 to 3.6
Ratings
–50
–50
±50
0.7
DDQ
= 2.5 V.
Unit
mA
mA
mA
°
W
V
V
V
V
C
13
14
17
16
24
25
26
27
19
2
1
4
5
CLKIN
V
V
V
Y0
Y0
Y1
Y1
Y2
Y2
Y3
Y3
Y4
Y4
Y5
Y5
FBOUT
I
O
O
< 0
< 0
= 0 to VDD
Conditions