CD4724BC_02 FAIRCHILD [Fairchild Semiconductor], CD4724BC_02 Datasheet
CD4724BC_02
Related parts for CD4724BC_02
CD4724BC_02 Summary of contents
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CD4724BC 8-Bit Addressable Latch General Description The CD4724BC is an 8-bit addressable latch with three address inputs (A0–A2), an active low enable input (E), active high clear input ( data input (D) and eight out- L puts (Q0–Q7). ...
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Logic Diagram www.fairchildsemi.com 2 ...
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Absolute Maximum Ratings (Note 2) DC Supply Voltage ( Input Voltage ( Storage Temperature ( Power Dissipation ( Dual-In-Line Small Outline Lead Temperature ( (Soldering, 10 seconds) ...
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AC Electrical Characteristics pF, R 200k, Input Symbol Parameter t Propagation Delay PHL, tPLH Data to Output Propagation Delay PLH PHL Enable to Output t Propagation Delay ...
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Switching Time Waveforms 5 www.fairchildsemi.com ...
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Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow www.fairchildsemi.com Package Number M16A 6 ...
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...