24AA256-EMC MICROCHIP [Microchip Technology], 24AA256-EMC Datasheet - Page 20
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24AA256-EMC
Manufacturer Part Number
24AA256-EMC
Description
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.24AA256-EMC.pdf
(42 pages)
- Current page: 20 of 42
- Download datasheet (815Kb)
24AAXX/24LCXX/24FCXX
8.3
Sequential reads are initiated in the same way as a
random read except that after the 24XX transmits the
first data byte, the master issues an acknowledge as
opposed to the Stop condition used in a random read.
This acknowledge directs the 24XX to transmit the next
sequentially addressed data byte (Figure 8-4). Follow-
ing the final byte transmitted to the master, the master
will NOT generate an acknowledge but will generate a
Stop condition. To provide sequential reads, the 24XX
contains an internal Address Pointer which is incre-
mented by one at the completion of each operation.
This Address Pointer allows the entire memory con-
tents to be serially read during one operation. If the last
address byte in the array is acknowledged, the Address
Pointer will roll over to address 0x00.
FIGURE 8-4:
DS21930B-page 20
Bus Activity
Master
SDA Line
Bus Activity
Sequential Read
SEQUENTIAL READ
Control
Byte
A
C
K
Data Byte
Initial
A
C
K
Data Byte
Second
A
C
K
Data Byte
Third
A
C
K
© 2007 Microchip Technology Inc.
Data Byte
Final
N
O
A
C
K
S
T
O
P
P
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