25LC256-EMF MICROCHIP [Microchip Technology], 25LC256-EMF Datasheet - Page 9

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25LC256-EMF

Manufacturer Part Number
25LC256-EMF
Description
256K SPI Bus Serial EEPROM
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
2.4
The 25XX256 contains a write enable latch.
Table 2-4 for the Write-Protect Functionality Matrix.
This latch must be set before any write operation will be
completed internally. The WREN instruction will set the
latch, and the WRDI will reset the latch.
FIGURE 2-4:
FIGURE 2-5:
 2003 Microchip Technology Inc.
Write Enable (WREN) and Write
Disable (WRDI)
WRITE ENABLE SEQUENCE (WREN)
WRITE DISABLE SEQUENCE (WRDI)
SCK
CS
SO
SCK
SI
CS
SO
SI
0
0
0
0
0
1
0
1
See
Preliminary
high-impedance
0
high-impedance
0
2
2
0
0
3
3
The following is a list of conditions under which the
write enable latch will be reset:
• Power-up
• WRDI instruction successfully executed
• WRSR instruction successfully executed
• WRITE instruction successfully executed
0
0
4
4
25AA256/25LC256
1
5
1
5
1
6
1 0
6
0
7
0
7
DS21822C-page 9

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