AT25080B ATMEL [ATMEL Corporation], AT25080B Datasheet
AT25080B
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AT25080B Summary of contents
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... PDIP, 8-lead JEDEC SOIC, 8-lead Ultra Thin Mini-MAP (MLP 2x3) and 8-lead TSSOP packages. The AT25080B/160B is enabled through the Chip Select pin (CS) and accessed via a three-wire interface consisting of Serial Data Input (SI), Serial Data Output (SO), and Serial Clock (SCK). All programming cycles are completely self-timed, and no sepa- rate erase cycle is required before write ...
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... Absolute Maximum Ratings* Operating Temperature..................................–55°C to +125°C Storage Temperature .....................................–65°C to +150°C Voltage on Any Pin with Respect to Ground .................................... –1.0V to +7.0V Maximum Operating Voltage .......................................... 6.25V DC Output Current........................................................ 5.0 mA AT25080B/160B [Preliminary] 2 8-lead Ultra Thin Mini-MAP (MLP 2x3) VCC HOLD ...
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... Supply Voltage CC1 V Supply Voltage CC2 V Supply Voltage CC3 I Supply Current CC1 I Supply Current CC2 5228B–SEEPR–7/08 AT25080B/160B [Preliminary] Block Diagram = 25° 1.0 MHz 40°C to +85°C, V – AI Test Condition MHz Open, Read 5. MHz Open, Read, CC Write = +5 ...
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... OH1 V Output Low-voltage OL2 V Output High-voltage OH2 Notes min and V max are reference only and are not tested Worst case measured at 85°C AT25080B/160B [Preliminary 40°C to +85°C, V – AI Test Condition MHz Open, CC Read, Write V = 1.8V ...
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... Data In Setup Time SU t Data In Hold Time H t HOLD Setup Time HD t HOLD Hold Time CD t Output Valid V t Output Hold Time HO 5228B–SEEPR–7/08 AT25080B/160B [Preliminary] = 40°C to +85° Specified, – Voltage Min 4.5–5.5 0 2.7–5.5 0 1.8–5.5 0 4.5–5.5 2.7–5.5 1.8–5.5 4.5– ...
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... AT25080B/160B, and the serial output pin (SO) will remain in a high impedance state until the falling edge detected again. This will reinitialize the serial communication. CHIP SELECT: The AT25080B/160B is selected when the CS pin is low. When the device is not selected, data will not be accepted via the SI pin, and the serial output pin (SO) will remain in a high impedance state ...
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... The WP pin function is blocked when the WPEN bit in the status register is “0”. This will allow the user to install the AT25080B/160B in a system with the WP pin tied to ground and still be able to write to the status register. All WP pin functions are enabled when the WPEN bit is set to “ ...
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... Bits 0–7 are “1”s during an internal write cycle. WRITE STATUS REGISTER (WRSR): The WRSR instruction allows the user to select one of four levels of protection. The AT25080B/160B is divided into four array segments. One-quarter, one-half, or all of the memory segments can be protected. Any of the data within any selected segment will therefore be read only ...
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... X X READ SEQUENCE (READ): Reading the AT25080B/160B via the Serial Output (SO) pin requires the following sequence. After the CS line is pulled low to select a device, the read op- code is transmitted via the SI line followed by the byte address to be read (A15 6). Upon completion, any data on the SI line will be ignored. The data (D7 address is then shifted out onto the SO line ...
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... If Bit 0 = “1”, the write cycle is still in progress. If Bit 0 = “0”, the write cycle has ended. Only the RDSR instruction is enabled during the write programming cycle. The AT25080B/160B is capable of a 32-byte page write operation. After each byte of data is received, the five low-order address bits are internally incremented by one; the high-order bits of the address will remain constant ...
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... Figure 3-2. WREN Timing Figure 3-3. WRDI Timing Figure 3-4. RDSR Timing SCK INSTRUCTION SI HIGH IMPEDANCE SO 5228B–SEEPR–7/08 AT25080B/160B [Preliminary MSB DATA OUT ...
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... HIGH IMPEDANCE SO Figure 3-6. READ Timing SCK SI INSTRUCTION HIGH IMPEDANCE SO Figure 3-7. WRITE Timing SCK INSTRUCTION SI HIGH IMPEDANCE SO AT25080B/160B [Preliminary BYTE ADDRESS ... ...
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... Figure 3-8. HOLD Timing CS SCK HOLD SO 5228B–SEEPR–7/08 AT25080B/160B [Preliminary ...
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... AT25080B Ordering Information Ordering Code AT25080B-PU (Bulk form only) (1) AT25080BN-SH-B (NiPdAu Lead Finish) (2) AT25080BN-SH-T (NiPdAu Lead Finish) (1) AT25080B-TH-B (NiPdAu Lead Finish) (2) AT25080B-TH-T (NiPdAu Lead Finish) (2) AT25080BY6-YH-T (NiPdAu Lead Finish) (2) AT25080BD3-DH-T (2) AT25080BU3-UU-T (NiPdAu Lead Finish) (3) AT25080B-W-11 Notes: 1. “B” denotes bulk. 2. “-T” deontes tape and reel. SOIC = 4K per reel. TSSOP, Ultra Thin Mini-MAP, SOT23, and dBGA2 = 5K per reel. ...
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... Body, 0.50 mm Pitch, Ultra Thin Mini-MAP, Dual No Lead Package (DFN), (MLP 2x3mm) 8D3 8-lead, 1 2.2 mm Body, Ultra axLanda Grid Array (ULLGA) 8U3-1 8-ball, die Ball Grid Array Package (dBGA2) −1.8 Low Voltage (1.8 to 5.5V) 5228B–SEEPR–7/08 AT25080B/160B [Preliminary] Voltage Package 1.8 8P3 1.8 8S1 1.8 8S1 1 ...
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... E and eA measured with the leads constrained to be perpendicular to datum. 5. Pointed or rounded lead tips are preferred to ease insertion and b3 maximum dimensions do not include Dambar protrusions. Dambar protrusions shall not exceed 0.010 (0.25 mm). 2325 Orchard Parkway San Jose, CA 95131 R AT25080B/160B [Preliminary ...
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... JEDEC SOIC e Side View Note: These drawings are for general information only. Refer to JEDEC Drawing MS-012, Variation AA for proper dimensions, tolerances, datums, etc. 1150 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 R 5228B–SEEPR–7/08 AT25080B/160B [Preliminary Top View TITLE 8S1, 8-lead (0.150" ...
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... Dimension b does not include Dambar protrusion. Allowable Dambar protrusion shall be 0.08 mm total in excess of the b dimension at maximum material condition. Dambar cannot be located on the lower radius of the foot. Minimum space between protrusion and adjacent lead is 0.07 mm. 5. Dimension D and determined at Datum Plane H. 2325 Orchard Parkway San Jose, CA 95131 R AT25080B/160B [Preliminary TITLE 8A2, 8-lead, 4 ...
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... Dimension b applies to metallized terminal and is measured between 0.15 mm and 0.30 mm from the terminal tip. If the terminal has the optional radius on the other end of the terminal, the dimension should not be measured in that radius area. 2325 Orchard Parkway San Jose, CA 95131 R 5228B–SEEPR–7/08 AT25080B/160B [Preliminary] Pin 1 Index Area A2 A3 TITLE 8Y6, 8-lead 2 ...
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... ULLGA PIN # TOP VIEW 1150 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 R AT25080B/160B [Preliminary SIDE VIEW SYMBOL TITLE 8D3, 8-lead (1.80 x 2.20 mm Body) Ultra Leadframe Land Grid Array (ULLGA PIN #1 ID ...
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... Revision History Lit No. 5228B 5228A 5228B–SEEPR–7/08 AT25080B/160B [Preliminary] Date Comments 7/2008 Changed ‘Endurance’ parameter on page 6 9/2007 Initial document release. 21 ...
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Headquarters Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131 USA Tel: 1(408) 441-0311 Fax: 1(408) 487-2600 Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to ...