23A640-E/P MICROCHIP [Microchip Technology], 23A640-E/P Datasheet - Page 11

• Manufacturer Part Number: 23A640-E/P
• Description: 64K SPI Bus Low-Power Serial SRAM
• Manufacturer: MICROCHIP [Microchip Technology]

2.5
The Read Status Register instruction (RDSR) provides
access to the STATUS register. The STATUS register
may be read at any time. The STATUS register is
formatted as follows:
TABLE 2-2:
FIGURE 2-7:
© 2009 Microchip Technology Inc.
MODE MODE
W/R = writable/readable.
SCK
W/R
CS
SO
7
SI
Read Status Register Instruction
(RDSR)
W/R
6
0
0
READ STATUS REGISTER TIMING SEQUENCE (RDSR)
STATUS REGISTER
5
–
0
0
1
High-Impedance
4
–
0
0
Instruction
2
3
–
0
0
3
2
–
0
0
4
1
1
–
1
HOLD
5
W/R
0
0
6
1
7
The mode bits indicate the operating mode of the
SRAM. The possible modes of operation are:
0 0 = Byte mode (default operation)
1 0 = Page mode
0 1 = Sequential mode
1 1 = Reserved
Write and read commands are shown in Figure 2-7 and
Figure 2-8.
The HOLD bit enables the Hold pin functionality. It must
be set to a ‘0’ before HOLD pin is brought low for HOLD
function to work properly. Setting HOLD to ‘1’ disables
feature.
Bits 2 through 5 are reserved and should always be set
to ‘0’. Bit 1 will read back as ‘1’ but should always be
written as ‘0’.
See Figure 2-7 for the RDSR timing sequence.
7
8
6
9
Data from STATUS Register
10
5
23A640/23K640
11
4
12
3
13
2
14
1
DS22126C-page 11
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0