AT88RF1354_09 ATMEL [ATMEL Corporation], AT88RF1354_09 Datasheet - Page 7

• Manufacturer Part Number: AT88RF1354_09
• Description: 13.56 MHz Type B RF Reader Specification
• Manufacturer: ATMEL [ATMEL Corporation]

3.1.
8547B–RFID–3/09
The Register Memory Map in Table 3 shows the field names for each register bit. Read-only registers are colored
yellow. Read/Write registers are colored green. Any bit identified as RFU or Reserved for Future Use is reserved for
future definition by Atmel; these bits must always remain 0 b.
Table 3.
Communications Protocol Registers
AT88RF1354 contains five 16 bit Communication Protocol Registers for configuration of the RF communication
protocol. Each register contains a high byte (CPRx_H) and a low byte (CPRx_L). The CPRx_H registers are used to
configure the Frame Wait Time. The CPRx_L registers are currently unused (Reserved for Future Use) and must
remain set to $00.
CPR0 is a read-only register containing the default ISO/IEC 14443 communication protocol settings. The Poll Single
and Poll Continuous Commands always use CPR0 to configure the RF channel during polling.
CPR1, CPR2, CPR3, and CPR4 are available for configuration of RF channel for the TX Data Command. Each TX
Data Command contains a field that selects the CPR register to be used, so frame wait time is independently
configured on each command. If different timeout settings are written to each CPRx register, then the application
developer can use an appropriate timeout for each TX Data Command sent, minimizing the time required to recover
when no response is received on the RF communication channel.
Register
CPR0_H
CPR1_H
CPR2_H
CPR3_H
CPR4_H
CPR0_L
CPR1_L
CPR2_L
CPR3_L
CPR4_L
SREG
EREG
Name
RXC
TXC
PLL
IDR
Register Memory Map
Register
Address
$0A
$0B
$0C
$0D
$0E
$0F
$00
$01
$02
$03
$04
$05
$06
$07
$08
$09
Bit 7
CRC
TXP
SL!
RF
All other register address values are not supported
13.56 MHz Type B RF Reader Specification
FRAME
Bit 6
POR
SL0
FWI
FWI
FWI
FWI
FWI
BYTE
Bit 5
ENB
CD
G
Reserved for future use
Reserved for future use
Reserved for future use
Reserved for future use
Reserved for future use
TIME
Bit 4
Description
ID
Bit 3
COL
RFU
ML
Bit 2
SPE
RFU
RFU
RFU
RFU
RFU
RFU
SS
Bit 1
RS1
RFU
Bit 0
RS0
7