AT88SC1616C ATMEL [ATMEL Corporation], AT88SC1616C Datasheet - Page 5

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AT88SC1616C

Manufacturer Part Number
AT88SC1616C
Description
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet

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Protocol
Selection
Asynchronous
T = 0 Protocol
Synchronous
Two-wire Protocol
2030AS–09/01
The AT88SC1616C is compatible with two different communication protocols: asynchronous T
= 0 as defined by ISO 7816-3 or a synchronous two-wire protocol. The power-up sequence
determines which of the two protocols will be used.
The power-up sequence complies with ISO 7816-3 for a cold reset.
The device will respond with a 64-bit ATR code, including hystorical bytes to indicate the
memory density within the CryptoMemory family. Once the asynchronous mode has been
selected, it is not possible to switch to the synchronous mode without powering off the device.
Figure 2. Asynchronous T = 0 Protocol
The synchronous mode is the default after powering up V
Figure 3. Synchronous Two-wire Protocol
V
Set I/O-SDA in receive mode.
Provide a clock signal to CLK-SCL.
RST goes high after 400 clock cycles.
Power-up V
After stable V
CC
goes high with RST, I/O-SDA and CLK-SCL low.
CC
CC
, RST goes high also.
CLK-SCL
CLK-SCL
, CLK-SCL and I/O-SDA may be driven.
I/O-SDA
I/O-SDA
RST
RST
V cc
V cc
CC
due to the internal pull-up on RST.
ATR
AT88SC1616C
5

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