AT49BV802AT ATMEL [ATMEL Corporation], AT49BV802AT Datasheet

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AT49BV802AT

Manufacturer Part Number
AT49BV802AT
Description
8-megabit (512K x 16/ 1M x 8) 3-volt Only Flash Memory
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet

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Features
Description
The AT49BV802A(T) is a 2.7-volt 8-megabit Flash memory organized as 524,288
words of 16 bits each or 1,048,576 bytes of 8 bits each. The x16 data appears on I/O0
- I/O15; the x8 data appears on I/O0 - I/O7. The memory is divided into 23 sectors for
erase operations. The AT49BV802A(T) is offered in a 48-lead TSOP and a 48-ball
CBGA package. The device has CE and OE control signals to avoid any bus conten-
tion. This device can be read or reprogrammed using a single power supply, making it
ideally suited for in-system programming.
Pin Configurations
Pin Name
A0 - A18
CE
OE
WE
RESET
RDY/BUSY
I/O0 - I/O14
I/O15 (A-1)
BYTE
NC
Single Voltage Read/Write Operation: 2.65V to 3.6V
Access Time – 70 ns
Sector Erase Architecture
Fast Byte/Word Program Time – 12 µs
Fast Sector Erase Time – 300 ms
Suspend/Resume Feature for Erase and Program
Low-power Operation
Data Polling, Toggle Bit, Ready/Busy for End of Program Detection
RESET Input for Device Initialization
Sector Lockdown Support
TSOP and CBGA Package Options
Top or Bottom Boot Block Configuration Available
128-bit Protection Register
Minimum 100,000 Erase Cycles
Common Flash Interface (CFI)
– Fifteen 32K Word (64K Bytes) Sectors with Individual Write Lockout
– Eight 4K Word (8K Bytes) Sectors with Individual Write Lockout
– Supports Reading and Programming from Any Sector by Suspending Erase
– Supports Reading Any Byte/Word in the Non-suspending Sectors by Suspending
– 12 mA Active
– 13 µA Standby
of a Different Sector
Programming of Any Other Byte/Word
Function
Addresses
Chip Enable
Output Enable
Write Enable
Reset
READY/BUSY Output
Data Inputs/Outputs
I/O15 (Data Input/Output, Word Mode)
A-1 (LSB Address Input, Byte Mode)
Selects Byte or Word Mode
No Connect
8-megabit
(512K x 16/
1M x 8)
3-volt Only
Flash Memory
AT49BV802A
AT49BV802AT
Rev. 3405C–FLASH–9/04
1

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AT49BV802AT Summary of contents

Page 1

... Write Enable RESET Reset RDY/BUSY READY/BUSY Output I/O0 - I/O14 Data Inputs/Outputs I/O15 (A-1) I/O15 (Data Input/Output, Word Mode) A-1 (LSB Address Input, Byte Mode) BYTE Selects Byte or Word Mode NC No Connect 8-megabit (512K x 16 3-volt Only Flash Memory AT49BV802A AT49BV802AT Rev. 3405C–FLASH–9/04 1 ...

Page 2

... This feature will put the erase or program on hold for any amount of time and let the user read data from or program data to any of the remaining sectors within the memory. The end of a program or an erase cycle is detected by the READY/BUSY pin, Data Polling or by the toggle bit ...

Page 3

... ERASURE: Before a byte/word can be reprogrammed, it must be erased. The erased state of memory bits is a logical “1”. The entire device can be erased by using the Chip Erase com- mand or individual sectors can be erased by using the Sector Erase command. ...

Page 4

... Erase command). An attempt to erase a sector that has been protected will result in the oper- ation terminating immediately. BYTE/WORD PROGRAMMING: Once a memory block is erased programmed (to a logi- cal “0” byte-by-byte word-by-word basis. Programming is accomplished via the internal device command register and is a four-bus cycle operation. The device will automati- cally generate the required internal program pulses ...

Page 5

... TOGGLE BIT: In addition to Data Polling the AT49BV802A(T) provides another method for determining the end of a program or erase cycle. During a program or erase operation, suc- cessive attempts to read data from the memory will result in I/O6 toggling between one and zero. Once the program cycle has completed, I/O6 will stop toggling and valid data will be read. Examining the toggle bit may begin at any time during a program cycle. Please see “ ...

Page 6

... The device also supports an erase suspend during a complete chip erase. While the chip erase is suspended, the user can read from any sector within the memory that is pro- tected. The command sequence for a chip erase suspend and a sector erase suspend are the same ...

Page 7

RDY/BUSY: An open-drain READY/BUSY output pin provides another method of detecting the end of a program or erase operation. RDY/BUSY is actively pulled low during the internal program and erase cycles and is released at the completion of the cycle. ...

Page 8

Figure 1. Data Polling Algorithm (Configuration Register = 00) START Read I/O7 - I/O0 Addr = VA YES I/O7 = Data I/ YES Read I/O7 - I/O0 Addr = VA I/O7 = Data? NO Program/Erase Operation ...

Page 9

Figure 3. Toggle Bit Algorithm (Configuration Register = 00) START Read I/O7 - I/O0 Read I/O7 - I/O0 NO Toggle Bit = Toggle? YES NO I/ YES Read I/O7 - I/O0 Twice Toggle Bit = NO Toggle? YES ...

Page 10

Status Bit Table Configuration Register Programming Erasing Erase Suspended & Read Erasing Sector Erase Suspended & Read Non-erasing Sector Erase Suspended & Program Non-erasing Sector Erase Suspended & Program Suspended and Reading from Non-suspended Sectors Program Suspended & Read Programming ...

Page 11

Command Definition in Hex 1st Bus Cycle Command Bus Sequence Cycles Addr Read 1 Addr Chip Erase 6 555 Sector Erase 6 555 Byte/Word Program 4 555 Enter Single Pulse 6 555 Program Mode Single Pulse 1 Addr Byte/Word Program ...

Page 12

Protection Register Addressing Table Word Use Block 0 Factory 1 Factory 2 Factory 3 Factory 4 User 5 User 6 User 7 User Note: All address lines not specified in the above table must be “0” when accessing the protection ...

Page 13

AT49BV802A – Sector Address Table Sector Size (Bytes/Words) SA0 8K/4K SA1 8K/4K SA2 8K/4K SA3 8K/4K SA4 8K/4K SA5 8K/4K SA6 8K/4K SA7 8K/4K SA8 64K/32K SA9 64K/32K SA10 64K/32K SA11 64K/32K SA12 64K/32K SA13 64K/32K SA14 64K/32K SA15 64K/32K ...

Page 14

... AT49BV802AT – Sector Address Table Sector Size (Bytes/Words) SA0 64K/32K SA1 64K/32K SA2 64K/32K SA3 64K/32K SA4 64K/32K SA5 64K/32K SA6 64K/32K SA7 64K/32K SA8 64K/32K SA9 64K/32K SA10 64K/32K SA11 64K/32K SA12 64K/32K SA13 64K/32K SA14 64K/32K SA15 8K/4K SA16 8K/4K SA17 ...

Page 15

... X can Refer to AC programming waveforms on page 20 12.0V ± 0.5V Manufacturer Code: 1FH (x8); 001FH (x16), Device Code: 00C1H - AT49BV802A; 00C3H - AT49BV802AT. 5. See details under “Software Product Identification Entry/Exit” on page 22. 3405C–FLASH–9/04 Ind RESET ...

Page 16

DC Characteristics Symbol Parameter I Input Load Current LI I Output Leakage Current Standby Current CMOS Active Read Current Programming Current CC1 CC V Input Low Voltage IL ...

Page 17

AC Read Characteristics Symbol Parameter t Read Cycle Time RC t Address to Output Delay ACC ( Output Delay CE ( Output Delay OE (3)( Output Float DF Output ...

Page 18

Input Test Waveforms and Measurement Level Output Test Load Pin Capacitance ( MHz 25°C Symbol Typ OUT Note: This parameter is characterized and is not 100% tested. AT49BV802A( ...

Page 19

AC Byte/Word Load Characteristics Symbol Parameter Address, OE Setup Time AS OES t Address Hold Time AH t Chip Select Setup Time CS t Chip Select Hold Time CH t Write Pulse Width (WE or CE) WP ...

Page 20

Program Cycle Characteristics Symbol Parameter t Byte/Word Programming Time BP t Address Setup Time AS t Address Hold Time AH t Data Setup Time DS t Data Hold Time DH t Write Pulse Width WP t Write Pulse Width High ...

Page 21

Data Polling Characteristics Symbol Parameter t Data Hold Time Hold Time OEH ( Output Delay OE t Write Recovery Time WR Notes: 1. These parameters are characterized and not 100% tested. 2. See t ...

Page 22

... Device Code is read for The device does not remain in identification mode if powered down. 4. The device returns to standard operation mode. 5. Manufacturer Code: 1FH(x8); 001FH(x16) Device Code: 00C1H - AT49BV802A; 00C3H - AT49BV802AT. 6. Either one of the Product ID Exit commands can be used. AT49BV802A(T) 22 (1) Sector Lockdown Enable Algorithm (1)(6) ...

Page 23

Table 1. Common Flash Interface Definition for AT49BV802A(T) Address [x16 Mode] Address [x8 Mode] 10h 20h 11h 22h 12h 24h 13h 26h 14h 28h 15h 2Ah 16h 2Ch 17h 2Eh 18h 30h 19h 32h 1Ah 34h 1Bh 36h 1Ch 38h ...

Page 24

Table 1. Common Flash Interface Definition for AT49BV802A(T) (Continued) Address [x16 Mode] Address [x8 Mode] Vendor Specific Extended Query 41h 82h 42h 84h 43h 86h 44h 88h 45h 8Ah 46h 8Ch 47h 8Eh 48h 90h 49h 92h 4Ah 94h 4Bh ...

Page 25

... Plastic Chip-Size Ball Grid Array Package (CBGA) 48T 48-lead, Plastic Thin Small Outline Package (TSOP) 3405C–FLASH–9/04 Ordering Code Package AT49BV802A-70CI 48C19 AT49BV802A-70TI AT49BV802AT-70CI 48C19 AT49BV802AT-70TI Package Type AT49BV802A(T) Operation Range Industrial 48T (-40° to 85°C) Industrial 48T (-40° to 85°C) 25 ...

Page 26

Packaging Information 48C19 – CBGA A1 Ball ID D Top View 1.0 REF Ø Bottom View 2325 Orchard Parkway San Jose, CA 95131 R AT49BV802A( Ball ...

Page 27

TSOP Pin 1 Identifier e E Notes: 1. This package conforms to JEDEC reference MO-142, Variation DD. 2. Dimensions D1 and E do not include mold protrusion. Allowable protrusion 0.15 mm per side and on ...

Page 28

Revision Revision A – February 2004 History Revision B – March 2004 Summary Revision C – September 2004 AT49BV802A(T) 28 • Initial Release • Removed AT49BV808A(T) device from datasheet • Modified CBGA Pinout and Package Drawing for AT49BV802A(T) • Removed ...

Page 29

... Atmel Corporation 2004. All rights reserved. Atmel are the trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be trademarks of others. Atmel Operations Memory 2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 ...

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