AT28C010-12DK-E ATMEL [ATMEL Corporation], AT28C010-12DK-E Datasheet - Page 4

• Manufacturer Part Number: AT28C010-12DK-E
• Description: Space 1-megabit (128K x 8) Paged Parallel EEPROMs
• Manufacturer: ATMEL [ATMEL Corporation]

DC and AC Operating
Range
Operating Modes
Notes:
4
Operating
Temperature (Case)
V
Mode
Read
Write
Standby/Write Inhibit
Write Inhibit
Write Inhibit
Output Disable
CC
Power Supply
(2)
1. X can be VIL or VIH.
2. Refer to AC Programming Waveforms
AT28C010-12DK
•
•
•
•
•
SDP is enabled by the host system issuing a series of three write commands; three
specific bytes of data are written to three specific addresses (refer to Software Data
Protection Algorithm). After writing the 3-byte command sequence and after t
entire AT28C010-12DK will be protected against inadvertent write operations. It
should be noted, that once protected the host may still perform a byte or page write
to the AT28C010-12DK. This is done by preceding the data to be written by the
same 3-byte command sequence used to enable SDP.
Once set, SDP will remain active unless the disable command sequence is issued.
Power transitions do not disable SDP and SDP will protect the AT28C010-12DK
during power-up and power-down conditions. All command sequences must
conform to the page write timing specifications. The data in the enable and disable
command sequences is not written to the device and the memory addresses used in
the sequence may be written with data in either a byte or page write operation.
After setting SDP, any attempt to write to the device without the 3-byte command
sequence will start the internal write timers. No data will be written to the device;
however, for the duration of t
operations.
DEVICE IDENTIFICATION: An extra 128 bytes of EEPROM memory are available
to the user for device identification. By raising A9 to 12V ± 0.5V and using address
locations 1FF80H to 1FFFFH the bytes may be written to or read from in the same
manner as the regular memory array.
OPTIONAL CHIP ERASE MODE: The entire device can be erased using a 6-byte
software code. Please see Software Chip Erase application note for details.
CE
V
V
V
X
X
X
IH
IL
IL
Mil.
WC
, read operations will effectively be polling
OE
V
V
V
V
X
X
IH
IH
IL
IL
(1)
WE
V
V
V
X
X
X
IH
IH
AT28C010-12DK-12
IL
-55°C - 125°C
5V ± 10%
I/O
D
D
High Z
High Z
OUT
IN
4259A–AERO–06/03
WC
the