AT28HC256N-12JI ATMEL [ATMEL Corporation], AT28HC256N-12JI Datasheet - Page 9

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AT28HC256N-12JI

Manufacturer Part Number
AT28HC256N-12JI
Description
256 (32K x 8) High-speed Parallel EEPROM
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
Software Data Protection
Enable Algorithm
Notes:
3446B–PEEPR–4/04
Software Protected Write Cycle Waveforms
Notes:
1. Data Format: I/O7 - I/O0 (Hex);
2. Write Protect state will be activated at end of write
3. Write Protect state will be deactivated at end of
4. 1 to 64 bytes of data are loaded.
1. A6 through A14 must specify the same page address during each high to low transition of WE (or CE) after the software
2. OE must be high only when WE and CE are both low.
Address Format: A14 - A0 (Hex).
even if no other data is loaded.
write period even if no other data is loaded.
code has been entered.
LOAD LAST BYTE
ANY ADDRESS
ADDRESS 2AAA
LAST ADDRESS
ADDRESS 5555
ADDRESS 5555
LOAD DATA AA
LOAD DATA A0
LOAD DATA XX
LOAD DATA 55
TO
TO
TO
TO
TO
(4)
(1)
WRITES ENABLED
ENTER DATA
PROTECT STATE
t
AS
t
t
DS
AH
(2)
t
WP
t
DH
t
WPH
Software Data Protection Disable
Algorithm
(1)(2)
(1)
LOAD LAST BYTE
ANY ADDRESS
ADDRESS 2AAA
ADDRESS 2AAA
LAST ADDRESS
ADDRESS 5555
ADDRESS 5555
ADDRESS 5555
ADDRESS 5555
LOAD DATA AA
LOAD DATA AA
LOAD DATA XX
LOAD DATA 55
LOAD DATA 80
LOAD DATA 55
LOAD DATA 20
t
BLC
TO
TO
TO
TO
TO
TO
TO
TO
(4)
EXIT DATA
PROTECT STATE
t
WC
AT28HC256N
(3)
9

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