M24C01-BN3T STMICROELECTRONICS [STMicroelectronics], M24C01-BN3T Datasheet - Page 12

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M24C01-BN3T

Manufacturer Part Number
M24C01-BN3T
Description
16Kbit, 8Kbit, 4Kbit, 2Kbit and 1Kbit Serial I2C Bus EEPROM
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
M24C16, M24C08, M24C04, M24C02, M24C01
Sequential Read
This operation can be used after a Current Ad-
dress Read or a Random Address Read. The bus
master does acknowledge the data byte output,
and sends additional clock pulses so that the de-
vice continues to output the next byte in sequence.
To terminate the stream of bytes, the bus master
must not acknowledge the last byte, and must
generate a Stop condition, as shown in
The output data comes from consecutive address-
es, with the internal address counter automatically
incremented after each byte output. After the last
memory address, the address counter ‘rolls-over’,
and the device continues to output data from
memory address 00h.
12/29
Figure
9..
Acknowledge in Read Mode
For all Read commands, the device waits, after
each byte read, for an acknowledgment during the
9
Data (SDA) Low during this time, the device termi-
nates the data transfer and switches to its Stand-
by mode.
INITIAL DELIVERY STATE
The device is delivered with the memory array
erased: all bits are set to 1 (each byte contains
FFh).
th
bit time. If the bus master does not drive Serial

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