M95128-BN3 STMICROELECTRONICS [STMicroelectronics], M95128-BN3 Datasheet - Page 17

• Manufacturer Part Number: M95128-BN3
• Description: 256Kbit and 128Kbit Serial SPI Bus EEPROM With High Speed Clock
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

Read from Memory Array (READ)
As shown in
the device, Chip Select (S) is first driven Low. The
bits of the instruction byte and address bytes are
then shifted in, on Serial Data Input (D). The ad-
dress is loaded into an internal address register,
and the byte of data at that address is shifted out,
on Serial Data Output (Q).
If Chip Select (S) continues to be driven Low, the
internal address register is automatically incre-
mented, and the byte of data at the new address is
shifted out.
Figure 12. Read from Memory Array (READ) Sequence
Note: The most significant address bits (b15 for the M95256, and bits b15 and b14 for the M95128) are Don’t Care.
S
C
D
Q
Figure
0
12., to send this instruction to
1
High Impedance
2
Instruction
3
4
5
6
7
MSB
15
8
14 13
9 10
16-Bit Address
3
20 21 22 23 24 25 26 27
When the highest address is reached, the address
counter rolls over to zero, allowing the Read cycle
to be continued indefinitely. The whole memory
can, therefore, be read with a single READ instruc-
tion.
The Read cycle is terminated by driving Chip Se-
lect (S) High. The rising edge of the Chip Select
(S) signal can occur at any time during the cycle.
The first byte addressed can be any byte within
any page.
The instruction is not accepted, and is not execut-
ed, if a Write cycle is currently in progress.
2
1
0
MSB
7
6
5
Data Out 1
4
3
28 29 30
2
1
0
31
M95256, M95128
7
Data Out 2
AI01793D
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