M93C56-125 STMICROELECTRONICS [STMicroelectronics], M93C56-125 Datasheet - Page 19

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M93C56-125

Manufacturer Part Number
M93C56-125
Description
Automotive 16-Kbit, 8-Kbit, 4-Kbit, 2-Kbit and 1-Kbit (8-bit or 16-bit wide) MICROWIRE serial EEPROM
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
M93C86-125 M93C76-125 M93C66-125 M93C56-125 M93C46-125
9
Clock pulse counter
In a noisy environment, the number of pulses received on Serial Clock (C) may be greater
than the number delivered by the master (the microcontroller). This can lead to a
misalignment of the instruction of one or more bits (as shown in
the writing of erroneous data at an erroneous address.
To avoid this problem, the M93Cx6 has an on-chip counter that counts the clock pulses from
the start bit until the falling edge of the Chip Select Input (S). If the number of clock pulses
received is not the number expected, the WRITE, ERASE, ERAL or WRAL instruction is
aborted, and the contents of the memory are not modified.
The number of clock cycles expected for each instruction, and for each member of the
M93Cx6 family, are summarized in
Instruction set for the M93C76 and
instruction on the M93C56 (or M93C66) expects 20 clock cycles (for the x8 organization)
from the start bit to the falling edge of Chip Select Input (S). That is:
Figure 7.
S
D
C
1 Start bit
+ 2 Op-code bits
+ 9 Address bits
+ 8 Data bits
START
Write sequence with one clock glitch
"0"
WRITE
Doc ID 022572 Rev 1
"1"
M93C86. For example, a Write Data to Memory (WRITE)
Table 4: Instruction set for the M93C46
An
Glitch
An-1
ARE SHIFTED BY ONE BIT
ADDRESS AND DATA
An-2
Figure
Clock pulse counter
7) and may lead to
D0
to
Table 6:
AI01395
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