M95080-DW6 STMICROELECTRONICS [STMicroelectronics], M95080-DW6 Datasheet

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M95080-DW6

Manufacturer Part Number
M95080-DW6
Description
16Kbit and 8Kbit Serial SPI Bus EEPROM With High Speed Clock
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet

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FEATURES SUMMARY
Table 1. Product List
October 2004
Compatible with SPI Bus Serial Interface
(Positive Clock SPI Modes)
Single Supply Voltage:
High Speed
Status Register
Hardware Protection of the Status Register
BYTE and PAGE WRITE (up to 32 Bytes)
Self-Timed Programming Cycle
Adjustable Size Read-Only EEPROM Area
Enhanced ESD Protection
More than 1 Million Erase/Write Cycles
More than 40-Year Data Retention
Reference
4.5 to 5.5V for M95xxx
2.5 to 5.5V for M95xxx-W
1.8 to 5.5V for M95xxx-R
10MHz Clock Rate, 5ms Write Time
M95160
M95080
M95160
M95160-W
M95160-R
M95080
M95080-W
M95080-R
Part Number
16Kbit and 8Kbit Serial SPI Bus EEPROM
Figure 1. Packages
With High Speed Clock
3x3mm² body size (MSOP)
UFDFPN8 (MB)
TSSOP8 (DS)
TSSOP8 (DW)
2x3mm² (MLP)
8
150 mil width
169 mil width
8
PDIP8 (BN)
SO8 (MN)
1
1
M95160
M95080
1/40

Related parts for M95080-DW6

M95080-DW6 Summary of contents

Page 1

... M95160 M95160-W M95160-R M95080 M95080 M95080-W M95080-R October 2004 16Kbit and 8Kbit Serial SPI Bus EEPROM Figure 1. Packages Part Number M95160 M95080 With High Speed Clock 8 1 PDIP8 (BN SO8 (MN) 150 mil width TSSOP8 (DW) 169 mil width TSSOP8 (DS) 3x3mm² body size (MSOP) UFDFPN8 (MB) 2x3mm² ...

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... M95160, M95080 TABLE OF CONTENTS FEATURES SUMMARY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Table 1. Product List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Figure 1. Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 SUMMARY DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 2. Logic Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 3. DIP, SO, TSSOP and MLP Connections (Top View Table 2. Signal Names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 SIGNAL DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Serial Data Output ( Serial Data Input ( Serial Clock ( Chip Select ( Hold (HOLD) ...

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... Table 19. AC Characteristics (M95xxx, Device Grade Table 20. AC Characteristics (M95xxx, Device Grade Table 21. AC Characteristics (M95xxx-W, Device Grade Table 22. AC Characteristics (M95xxx-W, Device Grade Table 23. AC Characteristics (M95xxx- Figure 15.Serial Input Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Figure 16.Hold Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Figure 17.Output Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 M95160, M95080 3/40 ...

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... M95160, M95080 PACKAGE MECHANICAL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Figure 18.PDIP8 – 8 pin Plastic DIP, 0.25mm lead frame, Package Outline . . . . . . . . . . . . . . . . . 33 Table 24. PDIP8 – 8 pin Plastic DIP, 0.25mm lead frame, Package Mechanical Data . . . . . . . . . . 33 Figure 19.SO8 narrow – 8 lead Plastic Small Outline, 150 mils body width, Package Outline . . . . 34 Table 25. SO8 narrow – ...

Page 5

... V SS Figure 3. DIP, SO, TSSOP and MLP Connections (Top View) Figure 2.. Note: See sions, and how to identify pin-1. Q Table 2. Signal Names HOLD V CC AI01789C V SS M95160, M95080 M95xxx HOLD AI01790D PACKAGE MECHANICAL ...

Page 6

... M95160, M95080 SIGNAL DESCRIPTION During all operations, V must be held stable and CC within the specified valid range (max). CC All of the input and output signals must be held High or Low (according to voltages specified in Table 14. OL These signals are described next. Serial Data Output (Q). This output signal is used to transfer data serially out of the device ...

Page 7

... MCU SPI bus. Only one device is selected at a time, so only one device drives the Serial Data Output (Q) line at a time, all the others being high impedance SPI Memory SPI Memory Device Device HOLD W M95160, M95080 SPI Memory Device S HOLD W HOLD AI03746D 7/40 ...

Page 8

... M95160, M95080 SPI Modes These devices can be driven by a microcontroller with its SPI peripheral running in either of the two following modes: – CPOL=0, CPHA=0 – CPOL=1, CPHA=1 For these two modes, input data is latched in on the rising edge of Serial Clock (C), and output data Figure 5 ...

Page 9

... The Hold condition starts when the Hold (HOLD) signal is driven Low at the same time as Serial Clock (C) already being Low. The Hold condition ends when the Hold (HOLD) signal is driven High at the same time as Serial Clock (C) already being Low. M95160, M95080 , as specified in Table 14 Table ...

Page 10

... M95160, M95080 Status Register Figure 6. shows the position of the Status Register in the control logic of the device. The Status Reg- ister contains a number of status and control bits that can be read or set (as appropriate) by specific instructions. WIP bit. The Write In Progress (WIP) bit indicates whether the memory is busy with a Write or Write Status Register cycle ...

Page 11

... MEMORY ORGANIZATION The memory is organized as shown in Figure 6. Block Diagram HOLD W Control Logic Address Register and Counter Figure 6.. High Voltage Generator I/O Shift Register Data Register 1 Page X Decoder M95160, M95080 Status Register Size of the Read only EEPROM area AI01272C 11/40 ...

Page 12

... M95160, M95080 INSTRUCTIONS Each instruction starts with a single-byte code, as summarized in Table 5 invalid instruction is sent (one not contained in Table 5.), the device automatically deselects it- self. 12/40 Table 5. Instruction Set Instruc Description tion WREN Write Enable WRDI Write Disable RDSR Read Status Register WRSR ...

Page 13

... The Write Enable Latch (WEL) bit, in fact, be- comes reset by any of the following events: – Power-up – WRDI instruction execution – WRSR instruction completion – WRITE instruction completion Instruction High Impedance AI03750D M95160, M95080 7., to send this instruction to 13/40 ...

Page 14

... M95160, M95080 Read Status Register (RDSR) The Read Status Register (RDSR) instruction al- lows the Status Register to be read. The Status Register may be read at any time, even while a Write or Write Status Register cycle is in progress. When one of these cycles is in progress rec- ommended to check the Write In Progress (WIP) bit before sending a new instruction to the device ...

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... Status Register are rejected, and are not accepted for execution consequence, all the data bytes in the memory area that are software protected (SPM) by the Block Protect M95160, M95080 3.. Memory Content 1 Unprotected Area Ready to accept Write ...

Page 16

... Software Protected Mode (SPM), using the Block Protect (BP1, BP0) bits of the Status Register, can be used. Table 7. Address Range Bits Device Address Bits Note: b15 to b11 are Don’t Care on the M95160. b15 to b10 are Don’t Care on the M95080 ...

Page 17

... Write cycle is currently in progress 16-Bit Address MSB Table 7., the most significant address bits are Don’t Care. M95160, M95080 Data Out 1 Data Out MSB AI01793D 17/40 ...

Page 18

... M95160, M95080 Write to Memory Array (WRITE) As shown in Figure 12., to send this instruction to the device, Chip Select (S) is first driven Low. The bits of the instruction byte, address byte, and at least one data byte are then shifted in, on Serial Data Input (D). The instruction is terminated by driving Chip Se- lect (S) High at a byte boundary of the input data ...

Page 19

... Address Data Byte Table 7., the most significant address bits are Don’t Care. M95160, M95080 Data Byte Data Byte ...

Page 20

... M95160, M95080 POWER-UP AND DELIVERY STATE Power-up State After Power-up, the device is in the following state: – Standby Power mode – deselected (after Power-up, a falling edge is required on Chip Select (S) before any instructions can be started). – not in the Hold Condition – the Write Enable Latch (WEL) is reset to 0 – ...

Page 21

... AEC-Q100-002 (compliant with JEDEC Std JESD22-A114A, C1=100pF, R1=1500 , R2=500 ) this specification, is not implied. Exposure to Ab- solute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. Parameter 2 M95160, M95080 Min. Max. Unit –65 150 °C 1 ° ...

Page 22

... M95160, M95080 DC AND AC PARAMETERS This section summarizes the operating and mea- surement conditions, and the DC and AC charac- teristics of the device. The parameters in the DC and AC Characteristic tables that follow are de- rived from tests performed under the Measure- Table 9. Operating Conditions (M95xxx) Symbol ...

Page 23

... V , Previous Product Present Product mA –2 mA M95160, M95080 Min. Max Min. Max. ± 2 ± –0. ...

Page 24

... M95160, M95080 Table 15. DC Characteristics (M95xxx, Device Grade 3) Symbol Parameter I Input Leakage Current LI I Output Leakage Current LO I Supply Current CC Supply Current I CC1 (Standby Power mode) V Input Low Voltage IL V Input High Voltage IH 1 Output Low Voltage Output High Voltage ...

Page 25

... OUT 0.1V /0. MHz 1 open 1 0. –0 M95160, M95080 Min. Max. Unit ± 2 ± –0. 0.4 0 Unit Min. Max. ± 2 ± 0.5 – ...

Page 26

... M95160, M95080 Table 19. AC Characteristics (M95xxx, Device Grade 6) Test conditions specified in Symbol Alt Clock Frequency C SCK Active Setup Time SLCH CSS1 Not Active Setup Time SHCH CSS2 Deselect Time SHSL Active Hold Time CHSH CSH ...

Page 27

... Previous product: identified by Process Identification letter L. 5. Present product: identified by Process Identification letter Table 12. and Parameter Min. D.C. 200 200 200 200 200 200 200 40 50 140 (max) C M95160, M95080 Table Max. Min. Max 100 ...

Page 28

... M95160, M95080 Table 21. AC Characteristics (M95xxx-W, Device Grade 6) Test conditions specified in Symbol Alt Clock Frequency C SCK Active Setup Time SLCH CSS1 Not Active Setup Time SHCH CSS2 Deselect Time SHSL Active Hold Time CHSH CSH ...

Page 29

... Previous product: identified by Process Identification letter L. 5. Present product: identified by Process Identification letter Table 12. and Parameter Min. D.C. 200 200 200 200 200 200 200 40 50 140 (max) C M95160, M95080 Table 10 Max. Min. Max 100 ...

Page 30

... M95160, M95080 Table 23. AC Characteristics (M95xxx-R) Test conditions specified in Symbol Alt Clock Frequency C SCK Active Setup Time SLCH CSS1 Not Active Setup Time SHCH CSS2 Deselect Time SHSL Active Hold Time CHSH CSH t S Not Active Hold Time ...

Page 31

... Figure 15. Serial Input Timing S tCHSL C tDVCH D High Impedance Q Figure 16. Hold Timing HOLD tSLCH tCHSH tCHDX tCLCH MSB IN tHLCH tCLHL tHLQZ M95160, M95080 tSHSL tSHCH tCHCL LSB IN AI01447C tHHCH tCLHH tHHQV AI01448B 31/40 ...

Page 32

... M95160, M95080 Figure 17. Output Timing S C tCLQV tCLQX tCLQX Q ADDR.LSB IN D 32/40 tCH tCLQV tQLQH tQHQL tCL tSHQZ LSB OUT AI01449D ...

Page 33

... Min. Max. 5.33 0.38 2.92 4.95 0.36 0.56 1.14 1.78 0.20 0.36 9.02 10.16 7.62 8.26 6.10 7.11 – – – – 10.92 2.92 3.81 M95160, M95080 PDIP-B inches Typ. Min. Max. 0.210 0.015 0.130 0.115 0.195 0.018 0.014 0.022 0.060 0.045 0.070 0.010 0.008 0.014 0.365 0.355 0.400 0.310 0.300 0.325 0.250 0.240 0.280 0.100 – ...

Page 34

... M95160, M95080 Figure 19. SO8 narrow – 8 lead Plastic Small Outline, 150 mils body width, Package Outline Note: Drawing is not to scale. Table 25. SO8 narrow – 8 lead Plastic Small Outline, 150 mils body width, Mechanical Data Symbol Typ ddd ...

Page 35

... Min. Max. 0.50 0.60 0.022 0.00 0.05 0.20 0.30 0.010 0.079 1.55 1.65 0.05 0.118 0.15 0.25 – – 0.020 0.40 0.50 0.018 0.15 0.30 M95160, M95080 UFDFPN- must not be allowed to be connected to SS inches Typ. Min. Max. 0.020 0.024 0.000 0.002 0.008 0.012 0.061 0.065 0.002 0.006 0.010 – 0.016 0.020 ...

Page 36

... M95160, M95080 Figure 21. TSSOP8 – 8 lead Thin Shrink Small Outline, Package Outline A CP Note: Drawing is not to scale. Table 27. TSSOP8 – 8 lead Thin Shrink Small Outline, Package Mechanical Data Symbol Typ 1.000 3.000 e 0.650 E 6.400 E1 4.400 L 0.600 L1 1.000 N 8 36/40 D ...

Page 37

... M95160, M95080 TSSOP8BM inches Typ Min 0.0020 0.0335 0.0295 0.0098 0.0051 0.1181 0.1142 0.1929 0.1831 0.1181 0.1142 0.0256 – ...

Page 38

... Flow (HRCF) is described in the quality note QNEE9801. Please ask your nearest ST sales office for a copy. 2. TSSOP8, 169 mil width, package is not available for the M95160 identified by the process identification letter L. 3. TSSOP8, 3x3mm body size, package is available for the M95080 series only. 4. Used only for Device Grade 3 For a list of available options (speed, package, etc ...

Page 39

... SO8 narrow and TSSOP8 Package mechanical specifications updated. Product List summary table added. AEC-Q100-002 compliance. tHHQX corrected to tHHQV. 07-Oct-2004 4.0 10MHz, 5ms Write is now the present product. tCH+tCL<1/fC constraint clarified Description of Revision (min) improved to –0.45V IL (min) and V IO M95160, M95080 (min) improved. CC 39/40 ...

Page 40

... M95160, M95080 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice ...

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