M45PE10-07 STMICROELECTRONICS [STMicroelectronics], M45PE10-07 Datasheet - Page 20

• Manufacturer Part Number: M45PE10-07
• Description: 1 Mbit, low voltage, Page-Erasable Serial Flash memory with byte-alterability and a 50 MHz SPI bus interface
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

Instructions
6.4
6.4.1
6.4.2
20/45
Read Status Register (RDSR)
The Read Status Register (RDSR) instruction allows the Status Register to be read. The
Status Register may be read at any time, even while a Program, Erase or Write cycle is in
progress. When one of these cycles is in progress, it is recommended to check the Write In
Progress (WIP) bit before sending a new instruction to the device. It is also possible to read
the Status Register continuously, as shown in
The status bits of the Status Register are as follows:
WIP bit
The Write In Progress (WIP) bit indicates whether the memory is busy with a Write, Program
or Erase cycle. When set to 1, such a cycle is in progress, when reset to 0 no such cycle is
in progress.
WEL bit
The Write Enable Latch (WEL) bit indicates the status of the internal Write Enable Latch.
When set to 1 the internal Write Enable Latch is set, when set to 0 the internal Write Enable
Latch is reset and no Write, Program or Erase instruction is accepted.
Table 5.
1. WEL and WIP are volatile read-only bits (WEL is set and reset by specific instructions; WIP is
Figure 9.
S
C
D
Q
automatically set and reset by the internal logic of the device).
b7
0
Status Register format
Read Status Register (RDSR) instruction sequence and data-out
sequence
0
High Impedance
1
0
2
Instruction
3
4
5
0
6
7
MSB
7
8
6
Status Register Out
9 10 11 12 13 14 15
0
5
4
Figure
3
2
0
9.
1
0
MSB
7
6
Status Register Out
0
5
4
3
WEL
2
(1)
1
0
M45PE10
7
AI02031E
WIP
b0
(1)