M45PE80-VMN6P NUMONYX [Numonyx B.V], M45PE80-VMN6P Datasheet - Page 18

• Manufacturer Part Number: M45PE80-VMN6P
• Description: 8 Mbit, low voltage, Page-Erasable Serial Flash memory with byte alterability and a 50 MHz SPI bus interface
• Manufacturer: NUMONYX [Numonyx B.V]

Instructions
6.1
6.2
18/47
Write Enable (WREN)
The Write Enable (WREN) instruction
The Write Enable Latch (WEL) bit must be set prior to every Page Write (PW), Page
Program (PP), Page Erase (PE), and Sector Erase (SE) instruction.
The Write Enable (WREN) instruction is entered by driving Chip Select (S) Low, sending the
instruction code, and then driving Chip Select (S) High.
Figure 6.
Write Disable (WRDI)
The Write Disable (WRDI) instruction
The Write Disable (WRDI) instruction is entered by driving Chip Select (S) Low, sending the
instruction code, and then driving Chip Select (S) High.
The Write Enable Latch (WEL) bit is reset under the following conditions:
●
●
●
●
●
●
Figure 7.
Power-up
Write Disable (WRDI) instruction completion
Page Write (PW) instruction completion
Page Program (PP) instruction completion
Page Erase (PE) instruction completion
Sector Erase (SE) instruction completion
Write Enable (WREN) instruction sequence
Write Disable (WRDI) instruction sequence
S
C
D
Q
S
C
D
Q
High Impedance
0
(Figure
(Figure
High Impedance
1
0
2
1
Instruction
3
2
7) resets the Write Enable Latch (WEL) bit.
6) sets the Write Enable Latch (WEL) bit.
Instruction
4
3
5
4
6
5
7
6
7
AI02281E
AI03750D
M45PE80