M24M01-DF_12 STMICROELECTRONICS [STMicroelectronics], M24M01-DF_12 Datasheet - Page 20
M24M01-DF_12
Manufacturer Part Number
M24M01-DF_12
Description
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
1.M24M01-DF_12.pdf
(38 pages)
- Current page: 20 of 38
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Instructions
5.2
20/38
Read operations
Read operations are performed independently of the state of the Write Control (WC) signal.
After the successful completion of a Read operation, the device internal address counter is
incremented by one, to point to the next byte address.
For the Read instructions, after each byte read (data out), the device waits for an
acknowledgment (data in) during the 9th bit time. If the bus master does not acknowledge
during this 9th time, the device terminates the data transfer and switches to its Standby
mode.
Figure 10. Read mode sequences
Current
Address
Read
Random
Address
Read
Sequential
Current
Read
Sequention
Random
Read
Dev sel *
Dev sel *
ACK
Dev sel
Dev sel
Data out N
R/W
R/W
R/W
Doc ID 12943 Rev 10
ACK
ACK
ACK
ACK
R/W
NO ACK
Data out 1
Byte addr
Byte addr
Data out
NO ACK
ACK
ACK
ACK
Byte addr
Byte addr
ACK
ACK
ACK
Data out N
Dev sel *
Dev sel *
M24M01-R M24M01-DF
NO ACK
R/W
ACK
ACK
R/W
Data out1
Data out
NO ACK
AI01105d
ACK
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