CY62127DV18L-55BVI CYPRESS [Cypress Semiconductor], CY62127DV18L-55BVI Datasheet - Page 7

• Manufacturer Part Number: CY62127DV18L-55BVI
• Description: 1 Mb (64K x 16) Static RAM
• Manufacturer: CYPRESS [Cypress Semiconductor]

Write Cycle No. 1 (WE Controlled)
Write Cycle No. 2 (CE Controlled)
Notes:
16. Data I/O is high-impedance if OE = V
17. If CE goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state.
18. During the DON'T CARE period in the DATA I/O waveform, the I/Os are in output state and input signals should not be applied.
Document #:38-05226 Rev.*A
ADDRESS
ADDRESS
DATA I/O
DATA I/O
BHE / BLE
BHE/BLE
CE
CE
WE
OE
WE
OE
DON'T CARE
DON'T CARE
t
SA
IH
t
HZOE
t
.
HZOE
[11,12, 16, 17, 18]
[11,12, 16, 17, 18]
t
SA
PRELIMINARY
t
AW
t
AW
t
SCE
t
WC
t
WC
t
BW
t
BW
DATA
t
t
PWE
SD
DATA
t
t
PWE
SD
IN
t
IN
SCE
VALID
VALID
t
HA
t
HA
t
HD
CY62127DV18
t
HD
MoBL2
Page 7 of 11
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