AT26F004-SSU ATMEL [ATMEL Corporation], AT26F004-SSU Datasheet - Page 20

• Manufacturer Part Number: AT26F004-SSU
• Description: 4-megabit 2.7-volt Only Serial Firmware DataFlash Memory
• Manufacturer: ATMEL [ATMEL Corporation]

10.1.1
10.1.2
10.1.3
10.1.4
10.1.5
20
AT26F004
SPRL Bit
SPM Bit
WPP Bit
SWP Bits
WEL Bit
The SPRL bit is used to control whether the Sector Protection Registers can be modified or not.
When the SPRL bit is in the logical “1” state, all Sector Protection Registers are locked and can-
not be modified with the Protect Sector and Unprotect Sector commands (the device will ignore
these commands). Any sectors that are presently protected will remain protected, and any sec-
tors that are presently unprotected will remain unprotected.
When the SPRL bit is in the logical “0” state, all Sector Protection Registers are unlocked and
can be modified (the Protect Sector and Unprotect Sector commands will be processed as nor-
mal). The SPRL bit defaults to the logical “0” state after a power-up or a device reset.
The SPRL bit can be modified freely whenever the WP pin is deasserted. However, if the WP pin
is asserted, then the SPRL bit may only be changed from a logical “0” (Sector Protection Regis-
ters are unlocked) to a logical “1” (Sector Protection Registers are locked). In order to reset the
SPRL bit back to a logical “0” using the Write Status Register command, the WP pin will have to
first be deasserted.
The SPRL bit is the only bit of the Status Register than can be user modified via the Write Status
Register command.
The SPM bit indicates whether the device is in the Byte Program mode or the Sequential Pro-
gram mode. The default state after power-up or device reset is the Byte Program mode.
The WPP bit can be read to determine if the WP pin has been asserted or not.
The SWP bits provide feedback on the software protection status for the device. There are three
possible combinations of the SWP bits that indicate whether none, some, or all of the sectors
have been protected using the Protect Sector command. If the SWP bits indicate that some of
the sectors have been protected, then the individual Sector Protection Registers can be read
with the Read Sector Protection Registers command to determine which sectors are in fact
protected.
The WEL bit indicates the current status of the internal Write Enable Latch. When the WEL bit is
in the logical “0” state, the device will not accept any program, erase, Protect Sector, Unprotect
Sector, or Write Status Register commands. The WEL bit defaults to the logical “0” state after a
device power-up or reset. In addition, the WEL bit will be reset to the logical “0” state automati-
cally under the following conditions:
• Write Disable operation completes successfully
• Write Status Register operation completes successfully or aborts
• Protect Sector operation completes successfully or aborts
• Unprotect Sector operation completes successfully or aborts
• Byte Program operation completes successfully or aborts
• Sequential Program Mode reaches highest unprotected memory location
• Sequential Program Mode reaches the end of the memory array
• Sequential Program Mode aborts
3588A–DFLSH–10/05