W981216 WINBOND [Winbond], W981216 Datasheet - Page 37

• Manufacturer Part Number: W981216
• Description: 2M x 16 bit x 4 Banks SDRAM
• Manufacturer: WINBOND [Winbond]

Revision 1.0
Timing Chart of Read to Write cycle
In the case of Burst Length=4
(2) CAS Latency=3
(1) CAS Latency=2
(3) CAS Latency=4
( a ) Command
( b ) Command
( a ) Command
( b ) Command
( a ) Command
( b ) Command
DQM
DQM
DQM
DQM
DQM
DQM
DQ
DQ
DQ
DQ
DQ
DQ
Note ) The Output data must be masked by DQM to avoid I/O conflict
0
Read Write
Read
Read
Read
Read
Read
1
Write
Write
D0
D0
D0
2
Write
Write
Write
D1
D0
D0
D1
D0
D1
3
- 37 -
D2
D1
D1
D2
D1
D2
4
2M x 16 bit x 4 Banks SDRAM
D3
D2
D2
D3
D2
D3
5
D3
D3
D3
6
Publication Release Date: March, 1999
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8
9
W981216AH
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