M58BW016DB70T3FF STMICROELECTRONICS [STMicroelectronics], M58BW016DB70T3FF Datasheet - Page 25

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M58BW016DB70T3FF

Manufacturer Part Number
M58BW016DB70T3FF
Description
16 Mbit (512 Kb x 32, boot block, burst) 3 V supply Flash memories
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
M58BW016DT, M58BW016DB, M58BW016FT, M58BW016FB
Table 7.
1. X latencies can be calculated as: (t
2. Y latencies can be calculated as: t
M13-M11
number from 4 to 8, t
calculation).
M5-M4
M2-M0
M15
M14
M10
M9
M8
M7
M6
M3
Bit
Burst Configuration Register
Valid Data Ready
Valid Clock Edge
Burst Length
Description
Read Select
Y-Latency
X-Latency
Burst Type
Wrapping
K
is the clock period and t
(2)
(1)
KHQV
AVQV
Value
+ t
000
001
010
011
100
101
110
111
000
001
010
011
100
101
110
111
– t
00
01
10
11
0
1
0
0
0
1
0
1
0
1
0
1
0
1
SYSTEM MARGIN
LLKH
SYSTEM MARGIN
+ t
Synchronous Burst Read
Asynchronous Read (default at power-on)
Reserved (default value)
Reserved (default value)
Reserved
Reserved
5, 5-1-1-1, 5-2-2-2
6, 6-1-1-1, 6-2-2-2
7, 7-1-1-1, 7-2-2-2
8, 8-1-1-1, 8-2-2-2
Reserved
Reserved (default value)
One Burst Clock cycle (default value)
Two Burst Clock cycles
R valid Low during valid Burst Clock edge (default
value)
R valid Low 1 data cycle before valid Burst Clock edge
Interleaved (default value)
Sequential
Falling Burst Clock edge (default value)
Rising Burst Clock edge
Reserved (default value)
Reserved
Reserved
Reserved
Wrap (default value)
No wrap
Reserved (default value)
4 double-words
8 double-words
Reserved
Reserved
Reserved
Reserved
Continuous
QVKH
) + t
+ t
SYSTEM MARGIN
QVKH
is the time margin required for the
< Y t
K.
Description
< (X -1) t
K
. (X is an integer
Bus operations
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