AT45DB081D-MU-SL954 ATMEL [ATMEL Corporation], AT45DB081D-MU-SL954 Datasheet - Page 52

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AT45DB081D-MU-SL954

Manufacturer Part Number
AT45DB081D-MU-SL954
Description
8-megabit 2.5-volt or 2.7-volt DataFlash
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
28. Revision History
52
AT45DB081D
Revision Level – Release Date
A – November 2005
B – March 2006
C – July 2006
D – November 2006
E – February 2007
F – August 2007
G – January 2008
H – January 2008
I – April 2008
J – February 2009
K – March 2009
L - April 2009
History
Initial Release
Added Preliminary.
Added text, in “Programming the Configuration Register”, to indicate
that power cycling is required to switch to “power of 2” page size
after the opcode enable has been executed.
Added “Legacy Commands” table.
Corrected PA3 in opcode 50h for addressing sequence with
standard page size. Corrected Chip Erase opcode from 7CH to
C7H. Clarified the commands B and C usage for operation mode.
Removed Preliminary.
Added errata regarding Chip Erase.
Changed various timing parameters under
Removed RDY/BUSY pin references.
Removed SER/BYTE statement from SI and SO pin descriptions in
Table 2-1.
Added additional text to “power of 2” binary page size option.
Changed t
Changed t
Added additional text, in “power of 2” binary page size option, to
indicate that the address format is changed for devices with page
size set to 256 bytes.
Corrected typographical error to indicate that Figure 13-1 indicates
Program Configuration Register.
Removed DataFlash card pinout.
Added part number ordering code details for suffixes SL954/955
Added ordering code details.
Changed t
Changed Deep Power-Down Current values
Updated Absolute Maximum Ratings
Removed Chip Erase Errata
- Increased typical value from 5 µA to 15 µA.
- Increased maximum value from 15 µA to 25 µA.
VSCL
RDPD
DIS
(Typ and Max) to 27 ns and 35 ns, respectively.
from 50 µs to 70 µs.
from 30 µs to 35 µs.
Table
18-4.
3596L–DFLASH–04/09

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