AT45DB321C-RI ATMEL [ATMEL Corporation], AT45DB321C-RI Datasheet - Page 9

• Manufacturer Part Number: AT45DB321C-RI
• Description: 32 MEGABIT 2.7 VOLT DATAFLASH
• Manufacturer: ATMEL [ATMEL Corporation]

3387B–DFLSH–9/04
Sector 0 (0a, 0b):
Note:
ERASING THE SECTOR PROTECTION REGISTER: To erase the Sector Protection
Register, the CS pin must first be asserted. Once the CS pin has been asserted, the
4-byte erase command sequence must be clocked in via the SI (serial input) pin. After
the last bit of the command sequence has been clocked in, the CS pin must be deas-
serted to initiate the internally self-timed erase cycle (t
indicate that the device is busy during the erase cycle. The erased state of each bit (of a
byte) in the Sector Protection Register indicates that the corresponding sector is flagged
for protection. The RESET pin is disabled during this erase cycle to prevent incomplete
erasure of the Sector Protection Register.
PROGRAMMING THE SECTOR PROTECTION REGISTER: To program the Sector
Protection Register, the CS pin must first be asserted. Once the CS pin has been
asserted, the 4-byte command sequence must be clocked in via the SI (serial input) pin.
After the last bit of the command sequence has been clocked in, the data for the con-
tents of the Sector Protection Register must be clocked in. The first byte corresponds to
sector 0 (0a, 0b), the second byte corresponds to Sector 1 and the last byte (byte 16)
corresponds to Sector 15. After the last bit of data has been clocked in, the CS pin must
be deasserted to initiate the internally self-timed program cycle (t
status will indicate that the device is busy during the program cycle. The RESET pin is
disabled during this program cycle to prevent incomplete programming of the sector pro-
tection register.
READING THE SECTOR PROTECTION REGISTER: To read the Sector Protection
Register, the CS pin must first be asserted. Once the CS pin has been asserted, a
4-byte command sequence 32H, 00H, 00H, 00H and 32 don’t care clock cycles must be
clocked in via the SI (serial input) pin. The 32 don’t care clock cycles are required to ini-
Sectors 0a, 0b
Unprotected
Protect Sector 0a
Protect Sector 0b
(Page 8-255)
Protect Sector 0b
(Page 256-511)
Protect Sectors 0a,
0b (Page 8-255), 0b
(Page 256-511)
Protect Sectors 0a,
0b (Page 8-255)
Command
Erase Sector Protection Register
Command
Program Sector Protection Register
1. Default value for devices shipped from Atmel.
2. When protecting or unprotecting sector 0b (pages 8-511), we recommend protecting
or unprotecting the entire sector 0b simultaneously.
(1)
Bit 6, 7
0a
00
11
00
00
11
11
(Page 8-255)
AT45DB321C [Preliminary]
Byte 1
Bit 4, 5
3DH
Byte 1
0b
00
00
11
00
11
11
3DH
Byte 2
(Page 256-511)
2AH
Byte 2
2AH
Bit 2, 3
PE
0b
00
00
00
11
11
00
). The Ready/Busy status will
Byte 3
Byte 3
7FH
7FH
P
). The Ready/Busy
Bit 0, 1
00
00
00
00
00
00
–
Byte 4
Byte 4
CFH
FCH
Value
Data
C0H
0CH
FCH
F0H
00H
30H
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