HM62256A HITACHI [Hitachi Semiconductor], HM62256A Datasheet - Page 10

• Manufacturer Part Number: HM62256A
• Description: 32,768-word x 8-bit High Speed CMOS Static RAM
• Manufacturer: HITACHI [Hitachi Semiconductor]

HM62256A Series
10
Write Timing Waveform (2) (
Notes: 1. A write occurs during the overlap of a low CS and a low WE. A write begins at the later
Address
WE
Din
CS
Dout
2. t
3. t
4. t
5. During this period, I/O pins are in the output state so that the input signals of the opposite
6. If the CS low transition occurs simultaneously with the WE low transition or after the WE
7. Dout is the same phase of the write data of this write cycle.
8. Dout is the read data of next address.
9. If CS is low during this period, I/O pins are in the output state. Therefore, the input signals
10. This parameter is sampled and not 100% tested.
11. t
transition of CS going low or WE going low. A write ends at the earlier transition of CS
going high or WE going high. t
write.
phase to the outputs must not be applied.
transition, the output remain in a high impedance state.
of the opposite phase to the output must not be applied to them.
conditions and are not referenced to output voltage levels.
CW
AS
WR
OHZ
is measured from the address valid to the beginning of write.
is measured from CS going low to the end of write.
is measured from the earlier of WE or CS going high to the end of write cycle.
and t
WHZ
t
AS
*3
are defined as the time at which the outputs achieve the open circuit
OE
Low Fixed)
*6
WP
t
t
WHZ
AW
is measured from the beginning of write to the end of
t
*5 *10
WC
t
t
WP
CW
*1
*2
t
Valid Data
DW
t
DH
t
WR
t
HM62256A Series
OW
*4
*10
t
*9
OH
*7
*8