HM628512 HITACHI [Hitachi Semiconductor], HM628512 Datasheet - Page 12

• Manufacturer Part Number: HM628512
• Description: 4 M SRAM (512-kword x 8-bit)
• Manufacturer: HITACHI [Hitachi Semiconductor]

HM628512B Series
Low V
Parameter
V
Data retention current
Chip deselect to data retention time t
Operation recovery time
Notes: 1. For L-version and 20 A (max.) at Ta = –20 to +40 C.
Low V
12
CC
0 V
V
2.2 V
V
4.5 V
CS
for data retention
CC
DR
CC
2. For L-SL-version and 3 A (max.) at Ta = –20 to +40 C.
3. For L-UL-version and 3 A (max.) at Ta = –20 to +40 C.
4. CS controls address buffer, WE buffer, OE buffer, and Din buffer. In data retention mode, Vin
5. Typical values are at V
6. t
CC
Data Retention Timing Waveform (CS Controlled)
levels (address, WE, OE, I/O) can be in the high impedance state.
Data Retention Characteristics (Ta = –20 to +70 C)
RC
= read cycle time.
t
CDR
CC
= 3.0 V, Ta = +25 C and specified loading, and not guaranteed.
Symbol
V
I
t
CCDR
CDR
R
DR
Data retention mode
Min
2
—
—
—
0
t
RC
CS
*
6
Typ
—
1*
1*
1*
—
—
V
CC
5
5
5
– 0.2 V
Max
—
50*
15*
10*
—
—
1
2
3
Unit
V
ns
ns
A
A
A
CS
V
CS
See retention waveform
Test conditions*
CC
= 3.0 V, Vin
V
V
CC
CC
– 0.2 V, Vin
– 0.2 V
t
R
4
0 V
0 V