X24C02B ICMIC [IC MICROSYSTEMS], X24C02B Datasheet - Page 11

• Manufacturer Part Number: X24C02B
• Description: Serial E2PROM
• Manufacturer: ICMIC [IC MICROSYSTEMS]

X24C02
WRITE CYCLE LIMITS
The write cycle time is the time from a valid stop condition of a write sequence to the end of the internal erase/program cycle.
During the write cycle, the X24C02 bus interface circuits are disabled, SDA is allowed to remain high, and the device does not
respond to its slave address.
Write Cycle Timing
Notes: (5)Typical values are for T
Guidelines for Calculating Typical Values of
Bus Pull-Up Resistors
SDA
SCL
Symbol
t
WR
(6) t
(6)
WR
device requires to perform the internal write operation.
is the minimum cycle time from the system perspective when polling techniques are not used. It is the maximum time the
120
100
40
20
80
60
0
0
MIN.
RESISTANCE
WORD n
BUS CAPACITANCE (pF)
8th BIT
Write Cycle Time
20
R
R
MAX.
RESISTANCE
MIN
MAX
Parameter
40
=
=
A
V
I
= 25 C and nominal supply voltage (5V)
C
OL MIN
CC MAX
60
BUS
t
R
80100120
ACK
=1.8KΟ
3838 FHD F17
Min.
CONDITION
STOP
11
SYMBOL TABLE
Typ.
WAVEFORM
t
WR
5
(5)
CONDITION
INPUTS
Must be
steady
May change
from Low to
High
May change
from High to
Low
Don’t Care:
Changes
Allowed
N/A
START
Max.
10
OUTPUTS
Will be
steady
Will change
from Low to
High
Will change
from High to
Low
Changing:
State Not
Known
Center Line
is High
Impedance
ADDRESS
X24C02
3838 FHD F05
Units
ms
3838 PGM T08