LT3640EFE LINER [Linear Technology], LT3640EFE Datasheet - Page 11

• Manufacturer Part Number: LT3640EFE
• Description: Dual Monolithic Buck Regulator with Power-On Reset and Watchdog Timer
• Manufacturer: LINER [Linear Technology]

OPERATION
when the V
pulled high and the FB1 pin voltage is above 1.165V. The
internal top power MOSFET is turned on each cycle at the
beginning of each oscillator cycle, and turned off when
the current fl owing through the top MOSFET reaches a
level determined by the voltage at the VC2 node. An error
amplifi er measures the output voltage through an external
resistor divider tied to the FB2 pin and servos the VC2
node. The reference of the error amplifi er is determined by
the lower of the internal 600mV reference and the voltage
at the SS2 pin.
While the top MOSFET is off, the bottom MOSFET is turned
on in an oscillator cycle until the inductor current starts
to reverse. If the inductor current is higher than the valley
current limit at the beginning of an oscillator cycle, the top
MOSFET will not turn on in this cycle, limiting inductor
current in shorted output fault.
An internal regulator provides power to the control circuitry.
The regulator draws most power from the V
small portion of power from the V
voltage is higher than 3V. If the voltage at V
than 3V, the regulator draws all power from the V
The EN/UVLO pin is used to put the LT3640 in shutdown,
reducing the input current to less than 1μA. The accurate
1.26V threshold of the EN/UVLO pin provides a program-
mable V
divider tied to the EN/UVLO pin. A 2μA hysteresis current
on the EN/UVLO pin prevents switching noise from shut-
ting down the LT3640.
The LT3640 has an overvoltage protection feature which
disables switching action in both channels when the V
pin voltage goes above 36V. When switching is disabled,
the LT3640 can sustain V
second.
Internal 2μA current sources charge the SS1 pin and
the SS2 pin up to about 2V. Soft-start or output voltage
tracking of the two channels can be independently imple-
mented with capacitors from the SS1 pin and the SS2 pin
IN
undervoltage lockout through an external resistor
IN2
pin voltage is above 2.3V, the EN2 pin is
IN
voltages up to 55V for one
IN
pin when the V
IN2
IN2
pin is lower
pin and a
IN
IN2
pin.
pin
IN
to ground. Any overvoltage or undervoltage condition on
the V
SS1 pin to below 100mV before it is released. If the EN2
pin goes low, the V
pin goes below 1.165V, the SS2 pin will be discharged to
below 100mV before it is released.
To optimize effi ciency, the LT3640 switches to low ripple
Burst Mode operation in light load situations. Between
switching pulses, control-circuitry current is minimized.
A power good comparator with 40mV of hysteresis trips
when the low voltage channel is enabled and the FB2 pin is
above 550mV. The PGOOD pin is an open-drain output that
is pulled low when both the outputs are in regulation.
Power-On Reset and Watchdog Timer
The LT3640 includes one power-on reset timer for each
buck regulator and one common watchdog timer. Power-
on reset and watchdog timers are both adjustable using
external capacitors. Operation can be best understood by
referring to the Timing Diagram.
The RST1, RST2 and WDO pins are all open-drain outputs
with weak internal pull-ups to about 2V. The RST1 and RST2
pins are pulled low when the LT3640 is enabled and V
above 3.6V. Once the FB1 pin rises above 1.165V, the high
voltage channel reset timer is started and RST1 is released
after the reset timeout period. The low voltage channel reset
timer is started once the FB2 pin rises above 550mV, and
releases RST2 after the reset timeout period.
The watchdog circuit monitors a μP’s activity. As soon
as both RST1 and RST2 are released, a delay timer is
started. The watchdog timer is started after the delay timer
times out. The LT3640 implements windowed watchdog
function for higher system reliability. The watchdog timer
detects falling edges on the WDI pin. If the falling edges
are grouped too close together or too far apart, the WDO
pin is pulled down and the reset timer is started. When the
reset timer times out, WDO is released and the watchdog
timer is again started after the delay period.
IN
pin triggers an internal latch that discharges the
IN2
voltage falls below 2.2V or the FB1
LT3640
11
IN
3640p
is