LT3685 LINER [Linear Technology], LT3685 Datasheet - Page 24

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LT3685

Manufacturer Part Number
LT3685
Description
36V, 4A, 1.5MHz Synchronous Step-Down Switching Regulator
Manufacturer
LINER [Linear Technology]
Datasheet

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LT3690
APPLICATIONS INFORMATION
PCB Layout
For proper operation and minimum EMI, care must be taken
during printed circuit board layout. Figure 13 shows the
recommended component placement with trace, ground
plane and via locations. Note that large, switched currents
flow in the LT3690’s V
capacitor (C
should be as small as possible. These components, along
with the inductor and output capacitor, should be placed
on the same side of the circuit board, and their connec-
tions should be made on that layer. Place a local, unbroken
ground plane below these components. The SW and BST
nodes should be small as possible. If synchronizing the
part externally using the SYNC pin, avoid routing this signal
near sensitive nodes, especially V
the FB and V
shield them from the SW and BST nodes. The exposed
GND pad on the bottom of the package must be soldered
to ground so that the pad acts as a heat sink. To keep ther-
mal resistance low, extend the ground plane as much as
possible, and add thermal vias under and near the LT3690
to additional ground planes within the circuit board and
on the bottom side. In addition, the exposed SW pad on
the bottom of the package must be soldered to the PCB
to act as a heat sink for the low side switch. Add thermal
vias under the SW pad and to the bottom side.
24
Figure 13. Top Layer PCB Layout and Component
Placement in the LT3690 Demonstration Board
V
IN
C
IN
IN
C
C
SS
). The loop formed by these components
nodes small so that the ground traces will
R1
R2
R
C
IN
C
C
C
, SW and GND pins and the input
VCC
C
R
F
T
C
BST
C
and FB. Finally, keep
L
C
OUT
V
OUT
GND
High Temperature Considerations
The PCB must provide heat sinking to keep the LT3690 cool.
The GND exposed pad on the bottom of the package must
be soldered to a ground plane and the SW exposed pad
must be soldered to a SW plane. Tie the ground plane and
SW plane to large copper layers below with thermal vias;
these layers will spread the heat dissipated by the LT3690.
Placing additional vias can reduce thermal resistance
further. With these steps, the thermal resistance from die
(or junction) to ambient can be reduced to θ
or less. With 100 LFPM airflow, this resistance can fall by
another 25%. Further increases in airflow will lead to lower
thermal resistance. Because of the large output current
capability of the LT3690, it is possible to dissipate enough
heat to raise the junction temperature beyond the absolute
maximum of 125°C. When operating at high ambient tem-
peratures, the maximum load current should be derated
as the ambient temperature approaches 125°C. Power
dissipation within the LT3690 can be estimated by calculat-
ing the total power loss from an efficiency measurement.
The die temperature is calculated by multiplying the LT3690
power dissipation by the thermal resistance from junction-
to-ambient. Thermal resistance depends on the layout of
the circuit board, but values from 20°C/W to 60°C/W are
typical. Die temperature rise was measured on a 4-layer,
6cm • 6cm circuit board in still air at a load current of 4A
temperature elevation above ambient was 43°C; for 24V
to 3.3V
was 55°C and for 24V
Other Linear Technology Publications
Application Notes 19, 35 and 44 contain detailed descrip-
tions and design information for buck regulators and other
switching regulators. The LT1376 data sheet has a more
extensive discussion of output ripple, loop compensa-
tion and stability testing. Design Note 318 shows how to
generate a bipolar output supply using a buck regulator.
SW
= 600kHz). For a 12V input to 3.3V output the die
OUT
the rise was 52°C; for 12V
IN
to 5V
OUT
the rise was 62°C.
IN
to 5V
JA
OUT
= 40°C/W
the rise
3690f
IN

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