DM9301F ETC [List of Unclassifed Manufacturers], DM9301F Datasheet

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DM9301F

Manufacturer Part Number
DM9301F
Description
100Mbps Ethernet Fiber/Twisted Pair Single Chip Media Converter
Manufacturer
ETC [List of Unclassifed Manufacturers]
Datasheet

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Part Number:
DM9301F
Manufacturer:
ALLIANCE
Quantity:
11 980
General Description
The DM9301 is a physical-layer, single-chip, low-
power media converter for 100BASE-TX/FX full
duplex repeater applications. On the TX media side,
it provides a direct interface to Unshielded Twisted
Pair Cable 5 (UTP5) for 100BASE-TX Fast Ethernet.
On the FX media side, it provides a direct interface to
a Pseudo Emitter Coupled Logic level interface
(PECL).
The DM9301 uses a low power and high
performance CMOS process. It contains the entire
physical layer functions of 100BASE-TX as defined
by IEEE802.3u, including the Physical Coding
Sublayer (PCS), Physical Medium Attachment
(PMA), Twisted Pair Physical Medium Dependent
Sublayer (TP-PMD) and a PECL compliant interface
for a fiber optic module, compliant with ANSI X3.166.
The DM9301 provides two independent clock
Block Diagram
Final
Version: DM9301-DS-F02
May 8, 2000
PECLRXI +/-
PECLTXO +/-
OSC/XTAL
PECLSD
25M
RCVR
PECL
RCVR
FXSD
TXMT
PECL
CGM
CRM
RX
NRZI
NRZ
to
NRZI
NRZ
to
125M FXRXCLK
to Serial
25M FXRXCLK
Parallel
Serial to
Parallel
Alignment
TX Code-
Monitor
100Mbps Ethernet Fiber/Twisted Pair Single Chip Media Converter
group
Link Status
LED Driver
Monitor &
Descrambler
Alignment
FX Code-
Monitor
group
25M TPRXCLK
Scrambler
recovery circuits to minimize bit delay through the
converter (no FIFO are used to buffer data between
the FX and TX interfaces). Furthermore, due to the
excellent rise/fall time control by a built-in wave-
shaping filter, the DM9301 needs no external filter to
transport signals to the media on the 100Base-TX
interface.
Patent-Pending Circuits
Serial to
Parallel
Smart adaptive receiver equalizer
Digital algorithm for high frequency clock/data
recovery circuit
High speed wave-shaping circuit
125M TPRXCLK
to Serial
Parallel
NRZI
NRZ
to
NRZI
NRZ
to
CRM
RX
NRZI to
MLT-3
MLT-3 to
NRZI
Rise/Fall
Adaptive
MLT-3
Driver
Time
CTL
EQ
DM9301
TPTXO+/-
TPRXI+/-
1

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DM9301F Summary of contents

Page 1

General Description The DM9301 is a physical-layer, single-chip, low- power media converter for 100BASE-TX/FX full duplex repeater applications. On the TX media side, it provides a direct interface to Unshielded Twisted Pair Cable 5 (UTP5) for 100BASE-TX Fast Ethernet. On ...

Page 2

Table of Contents General Description ................................................1 Block Diagram ........................................................1 Table of contents ....................................................2 Features .................................................................3 Pin Configuration: DM9301 QFP .............................4 Pin Description .......................................................5 Functional Description ..........................................10 100Base- Operation ................................10 FX PECL Receiver ............................................ Receiver Clock Recovery ...

Page 3

Features 100BASE-TX/FX single-chip media converter Total bit delay from interface is 20 bit times (10 bit times each direction). Optional propagate HALT on no Link condition Compliant with IEEE802.3u 100BASE-TX standard Compliant with ANSI X3T12 TP-PMD 1995 ...

Page 4

... Pin Configuration: DM9301F QFP 1 TPRXI+ TPRXI TPTXO- 14 TPTXO ...

Page 5

Pin Description Pin No. Pin Name Media Interface 1, 2 TPRXI+, TPRXI- 13, 14 TPTXO-, TPTXO+ 24, 25 PECLRXI-, PECLRXI+ 18, 19 PECLTXO-, PECLTXO+ 22, 23 PECLSD-, PECLSD+ Clock and Misc. Interface 27 OSCI/ OSC/XTL# 8 BGREF ...

Page 6

Clock and Misc. Interface (Continued) 84 TRIDRV 85 RESET# 34 HLTNOLNK 93 CONFIGA 95 CONFIGB LED Interface 67 FXLNKLED# 64 TXLNKLED# 69 FXRCVLED# 62 TXRCVLED# 80 FXERRLED# 6 100Mbps Ethernet Fiber/Twisted Pair Single Chip Media Converter I Tristate Digital Output ...

Page 7

LED Interface(Continued) 52 TXERRLED# Diagnostic Port Interface 36 FXALPBK 35 TXALPBK 96 FXDLPBK 97 TXDLPBK 79, 77, RXD0, RXD1, 76, 74, RXD2, RXD3, 73 RXD4 70 RXCLK 48, 47, TXD0, TXD1, 45, 44, TXD2, TXD3, 43 TXD4 71 TXCLK Final ...

Page 8

Diagnostic Port Interface (Continued) 39, 40 MUXCTL1, MUXCTL0 65, 54, TPO6, TPO5, 55, 57, TPO4, TPO3, 58, 60, TPO2, TPO1, 61 TPO0 92, 91, 89, TPI3, TPI2, TPI1, 88 TPI0, 8 100Mbps Ethernet Fiber/Twisted Pair Single Chip Media Converter Mux. ...

Page 9

Diagnostic Port Interface (Continued) 49 FRCFXSD 38 TPEN 87 TPMUX 41 BPSCRAM Power and Ground Pins : The power (VCC) and ground (GND) pins of the DM9301 are grouped in pairs of two categories - Digital Circuitry Power/Ground Pairs and ...

Page 10

Functional Description The DM9301 Fast Ethernet single-chip TX/FX media converter, provides the functionality as specified in IEEE802.3, integrates the complete 100BASE-TX and a PECL optic module interface for 100Base-FX. The DM9301 implements the PCS, PMA, and TP-PMD sublayer functions, as ...

Page 11

FX Serial to Parallel Converter The Serial to Parallel converter receives a serial data stream from the NRZI to NRZ converter, and converts the data stream to parallel data to be presented to the scrambler. The parallel data format presented ...

Page 12

FX Operation The block diagram in figure 2 provides an overview of the functional blocks contained in the media converter interface. The interface contains the following functional blocks: TX Digital Adaptive Equalization ...

Page 13

Therefore, the compensation or equalization must be adaptive to ensure proper conditioning of the received signal independent of the cable length. TX MLT-3 to NRZI Decoder The DM9301 decodes the MLT-3 information from the TX Digital Adaptive Equalizer into NRZI ...

Page 14

Absolute Maximum Ratings* Absolute Maximum Ratings ( Symbol V Max. Supply Voltage Input Voltage ( Output Voltage(V OUT Tstg Storage Temperature Rang (Tstg) PD Power Dissipation (PD) LT Lead Temp. (TL, ...

Page 15

DC Electrical Characteristics Symbol Parameter TTL Inputs (DPLXSEL, RESET Input Low Voltage IL V Input High Voltage IH I Input Low Current IL I Input High Current IH LED Driver Outputs (FXLINKLED#, TXLINKLED#, FXRXD#,RXRXD#) V Output Low Voltage ...

Page 16

AC Electrical Characteristics Symbol Parameter Transmitter t 100TXO+/- Differential Rise/Fall Time TR/F t 100TXO+/- Differential Rise/Fall Time TM Mismatch t 100TXO+/- Differential Output Duty Cycle TDC Distortion t 100TXO+/- Differential Output Peak-to- T/T Peak Jitter X 100TXO+/- Differential Voltage Overshoot ...

Page 17

Timing Waveforms 100BASE- Transmit Timing Diagram TPRXI+/- PECLTX+/- 100BASE- Transmit Timing Parameters Symbol Parameter t TPRXI+/- to PECLTX+/- Out (FX Latency 100BASE- Transmit Timing Diagram PECLTX+/- TPRXI+/- 100BASE- Transmit Timing ...

Page 18

Symbol 100Base-TX/FX Transmit Timing Parameters Symbol Parameter t TXD[4:0] Setup To TX_CLK High TXD[4:0] Hold From TX_CLK TX h High t TXD[4:0] Sampled To TPTXO TXD pdtpo (TXD to TP Latency) t TXD[4:0] Sampled To PECLTXO ...

Page 19

MII Application Circuit: DM9301 QFP .125 J1 Power Jack SOT-223 3.3v REG .80 Footprints for either Optical module 0.25 in Final Version: DM9301-DS-F02 May 8, 2000 100Mbps Ethernet Fiber/Twisted Pair Single Chip Media Converter (For Reference Only) DM9301 Sample, Fiber ...

Page 20

MII Application Circuit: DM9301 QFP 20 100Mbps Ethernet Fiber/Twisted Pair Single Chip Media Converter (Continued, For Reference Only) DM9301 Preliminary Version: DM9301-DS-F02 May 8, 2000 ...

Page 21

Package Information QFP 100L Outline Dimensions See Detail F Seating Plane Symbol Note: 1. Dimension D & not include resin fins. 2. Dimension ...

Page 22

... Ordering Information Part Number Pin Count DM9301F 100 Disclaimer The information appearing in this publication is believed to be accurate. Integrated circuits sold by DAVICOM Semiconductor are covered by the warranty and patent indemnification provisions stipulated in the terms of sale only. DAVICOM makes no warranty, express, statutory, implied or by description regarding the information in this ...

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