LM5035AMH NSC [National Semiconductor], LM5035AMH Datasheet - Page 23

• Manufacturer Part Number: LM5035AMH
• Description: PWM Controller with Integrated Half-Bridge and SyncFET PWM Controller with Integrated Half-Bridge and SyncFET
• Manufacturer: NSC [National Semiconductor]

To maintain the threshold’s accuracy, a resistor tolerance of
1% or better is recommended.
The design process starts with the choice of the voltage dif-
ference between the UVLO enabling and disabling thresh-
olds. This will also approximately set the difference between
OVP enabling and disabling regulation:
Next, the combined resistance of R
choosing the threshold for the UVLO disabling threshold:
Then R
old:
Finally, R
3
is determined by selecting the OVP disabling thresh-
3
is subtracted from R
R
2
= R
COMBINED
COMBINED
2
- R
and R
FIGURE 13. Remote Standby and Disable Control
3
to give R
3
is calculated by
2
:
23
Remote configuration of the controller’s operational modes
can be accomplished with open drain device(s) connected to
the UVLO pin as shown in
FAULT PROTECTION
The Over Voltage Protection (OVP) comparator of the
LM5035A can be configured for line or load fault protection or
thermal protection using an external temperature sensor or
thermistor.
plication using a voltage divider between the input power
supply, V
Figure 14
output over-voltage fault protection, using a zener and opto-
coupler. When V
opto-coupler diode and zener, the opto-coupler momentarily
turns on Q1 and the LM5035A enters standby mode, disabling
the drivers and enabling the hysteresis current source on the
OVP pin. Once the current source is enabled, the OVP volt-
age will remain at 2.3V (23 µA x 100 kΩ) without additional
drive from the external circuit. If the opto-coupler transistor
emitter were directly connected to the OVP pin, then leakage
current in the zener diode amplified by the opto-coupler’s gain
could falsely trip the protection latch. R1 and Q1 are added
reduce the sensitivity to low level currents in the opto-coupler.
Using the values of
rent must equal V
Once the controller has switched to standby mode, the out-
puts no longer switch but the VCC and REF regulators con-
tinue functioning and supply bias to the external circuitry. VCC
must fall below 6.2V or the UVLO pin must fall below 0.4V to
clear the OVP latch.
PWR
demonstrates the use of the OVP pin for latched
Figure 11
, and AGND to monitor the line voltage.
OUT
BE(Q1)
Figure
exceeds the conduction threshold of the
shows a line over voltage shutdown ap-
/ R1 = 350 µA before OVP latches.
Figure
14, the opto-coupler collector cur-
13.
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