STM8S103XX STMICROELECTRONICS [STMicroelectronics], STM8S103XX Datasheet - Page 39
STM8S103XX
Manufacturer Part Number
STM8S103XX
Description
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
1.STM8S103XX.pdf
(56 pages)
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STM8S103xx, STM8S105xx
7.3.1
Table 14.
1. TBD = to be determined.
2. Hysteresis voltage between Schmitt trigger switching levels. Based on characterization results, not tested in production.
3. Data based on characterization results, not tested in production.
Symbol
I
I
lkg ana
t
lkg(inj)
V
R
R
V
V
I
lkg
hys
, t
IH
pu
IL
F
Input low level
voltage
Input high level
voltage
Hysteresis
Pull-up resistor
Rise and fall time
(10% - 90%)
Input leakage
current,
analog and digital
Analog input
leakage current
Leakage current in
adjacent I/O
I/O port pin characteristics
General characteristics
Subject to general operating conditions for V
unused pins must be kept at a fixed voltage: using the output mode of the I/O for example or
an external pull-up or pull-down resistor.
I/O static characteristics
Parameter
(2)
(3)
V
Fast I/Os
Load = 50 pF
Standard and high sink I/Os
Load = 50 pF
V
V
Injection current ±4 mA
V
DD
DD
SS
SS
≤
≤
= 5.0 V
= 5 V, V
V
V
IN
IN
Conditions
≤
≤
(1)
V
V
DD
DD
IN
=V
SS
DD
0.7 x V
-0.3 V
and T
Min
30
DD
A
unless otherwise specified. All
Typ
700
45
Electrical characteristics
V
DD
±250
125
±1
20
±1
Max
TBD
+ 0.3 V
60
(3)
(3)
(3)
(3)
(3)
Unit
mV
kΩ
µA
nA
µA
ns
ns
V
V
39/56
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