FAN5307MP15X FAIRCHILD [Fairchild Semiconductor], FAN5307MP15X Datasheet - Page 7

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FAN5307MP15X

Manufacturer Part Number
FAN5307MP15X
Description
High-Efficiency Step-Down DC-DC Converter
Manufacturer
FAIRCHILD [Fairchild Semiconductor]
Datasheet

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
FAN5307MP15X
Manufacturer:
FAIRCHILD/仙童
Quantity:
20 000
FAN5307 Rev. 1.0.4
Block Diagram
Detailed Operation Description
The FAN5307 is a step-down converter operating in a
current-mode PFM/PWM architecture with a typical
switching frequency of 1MHz. At moderate to heavy
loads, the converter operates in pulse-width-modulation
(PWM) mode. At light loads the converter enters a
power-save mode (PFM pulse skipping) to keep the effi-
ciency high.
PWM Mode
In PWM mode, the device operates at a fixed frequency
of 1MHz. At the beginning of each clock cycle, the
P-channel transistor is turned on. The inductor current
ramps up and is monitored via an internal circuit. The
P-channel switch is turned off when the sensed current
causes the PWM comparator to trip when the output volt-
age is in regulation or when the inductor current reaches
the current limit (set internally to typically 520mA). After
a minimum dead time the N-channel transistor is turned
on and the inductor current ramps down. As the clock
cycle is completed, the N-channel switch is turned off
and the next clock cycle starts.
FB
GND
0.5V
SOFT START
DIGITAL
SLOPE COMPENSATION
IS
ERROR
AMPLIFIER
OSC
REF
IS
COMPARATOR
COMPARATOR
PFM
COMPARATOR
REF
VOLTAGE
OVER
FB
7
PFM (Power Save) Mode
As the load current decreases and the peak inductor cur-
rent no longer reaches the typical threshold of 80mA, the
converter enters pulse-frequency-modulation (PFM)
mode. In PFM mode the device operates with a variable
frequency and constant peak current thus reducing the
quiescent current to minimum. Consequently, the high
efficiency is maintained at light loads. As soon as the
output voltage falls below a threshold, set at 0.8% above
the nominal value, the P-channel transistor is turned on
and the inductor current ramps up. The P-channel switch
turns off and the N-channel turns on as the peak induc-
tor current is reached (typical 140mA).
The N-channel transistor is turned off before the inductor
current becomes negative. At this time the P-channel is
switched on again starting the next pulse. The converter
continues these pulses until the high threshold (typical
1.6% above nominal value) is reached. A higher output
voltage in PFM mode gives additional headroom for the
voltage drop during a load transient from light to full load.
The voltage overshoot during this load transient is also
minimized due to active regulation during turning on the
CONTROL
EN
LOGIC
UNDER VOLTAGE
LOCKOUT
COMPARATOR
NEG. LIMIT
MOSFET
DRIVER
IS
NEG. LIMIT
CURRENT
SENSE
SENSE
GND
V IN
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