FAN5308_07 FAIRCHILD [Fairchild Semiconductor], FAN5308_07 Datasheet - Page 7

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FAN5308_07

Manufacturer Part Number
FAN5308_07
Description
800mA High-Efficiency Step-Down DC-DC Converter
Manufacturer
FAIRCHILD [Fairchild Semiconductor]
Datasheet
©2005 Fairchild Semiconductor Corporation
FAN5308 Rev. 1.0.2
Block Diagram
Detailed Operation Description
The FAN5308 is a step-down converter operating in a
current-mode PFM/PWM architecture with a typical
switching frequency of 1.3MHz. At moderate to heavy
loads, the converter operates in pulse-width-modulation
(PWM) mode. At light loads, the converter enters a
power-save mode (PFM pulse skipping) to keep the effi-
ciency high.
PWM Mode
In PWM mode, the device operates at a fixed frequency
of 1.3MHz. At the beginning of each clock cycle, the P-
channel transistor is turned on. The inductor current
ramps up and is monitored via an internal circuit. The P-
channel switch is turned off when the sensed current
causes the PWM comparator to trip when the output volt-
age is in regulation or when the inductor current reaches
the current limit (set internally to typically 1500mA). After
a minimum dead time, the N-channel transistor is turned
on and the inductor current ramps down. As the clock
cycle is completed, the N-channel switch is turned off
and the next clock cycle starts.
FB
GND
0.8V
SOFT START
DIGITAL
SLOPE COMPENSATION
IS
ERROR
AMP
OSC
REF
IS
COMP
PFM
COMP
Figure 15. Block Diagram
REF
VOLTAGE
COMP
OVER-
FB
7
PFM (Power-Save) Mode
As the load current decreases and the inductor current
reaches negative value, the converter enters pulse-fre-
quency-modulation (PFM) mode. The transition point for
the PFM mode is given by the equation:
The typical output current, when the device enters PFM
mode, is 150mA for input voltage of 3.6V and output volt-
age of 1.2V. In PFM mode, the device operates with a
variable frequency and constant peak current, thus
reducing the quiescent current to minimum. Conse-
quently, the high efficiency is maintained at light loads.
As soon as the output voltage falls below a threshold, set
at 0.8% above the nominal value, the P-channel transis-
tor is turned on and the inductor current ramps up. The
P-channel switch turns off and the N-channel turns on as
the peak inductor current is reached (typical 450mA).
I
OUT
CONTROL
LOGIC
EN
UNDER-VOLTAGE
=
V
LOCKOUT
OUT
COMP
LIMIT
NEG.
1
------------------------------------------- -
MOSFET
DRIVER
V
2 L f
OUT
V
IS
IN
CURRENT
SENSE
SENSE
NEG.
LIMIT
GND
V
IN
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SW
EQ. 1

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