FAN53168MTC FAIRCHILD [Fairchild Semiconductor], FAN53168MTC Datasheet - Page 21

• Manufacturer Part Number: FAN53168MTC
• Description: 6-Bit VID Controlled 2-4 Phase DC-DC Controller
• Manufacturer: FAIRCHILD [Fairchild Semiconductor]

PRODUCT SPECIFICATION
Also shown is the standby dissipation factor (I
V
pation should be less than 400 mW. For our example, with
I
we find 202 mW in each driver, which is below the 400 mW
dissipation limit. See the FAN53418 data sheet for more
details.
Ramp Resistor Selection
The ramp resistor (R
internal PWM ramp. The value of this resistor is chosen to
provide the best combination of thermal balance, stability,
and transient response. The following expression is used for
determining the optimum value:
The internal ramp voltage magnitude can be calculated
using:
V
The size of the internal ramp can be made larger or smaller.
If it is made larger, stability and transient response will
improve, but thermal balance will degrade. Likewise, if the
ramp is made smaller, thermal balance will improve at the
sacrifice of transient response and stability. The factor of
three in the denominator of equation 19 sets a ramp size that
gives an optimal balance for good stability, transient
response, and thermal balance.
COMP Pin Ramp
There is a ramp signal on the COMP pin due to the droop
voltage and output voltage ramps. This ramp amplitude adds
to the internal ramp to produce the following overall ramp
signal at the PWM input.
For this example, the overall ramp signal is found to be
0.974 V.
REV. 1.0.0 6/9/03
R
R
V
V
CC
R
CC
R
R
RT
R
=
= 7 mA, Q
=
=
=
) for the driver. For the FAN53418, the maximum dissi-
=
-------------------------------------------------------------- -
301kΩ 5pF
A
-------------------------------------------------- -
0.2
------------------------------------------------ -
3 A
--------------------------------------------------------- -
3 5
--------------------------------------------------------------


R
×
×
1
R
×
×
–
R
0.2 650nH
(
D
(
×
-----------------------------------------------
n f
×
A
1 D
1 0.125
×
5.95mΩ 5pF
×
R
2
×
C
–
GMF
–
×
R
×
R
×
SW
DS
L
×
(
)
V
1 n D
×
f
R
= 24nC (max) and Q
×
×
SW
×
–
R
V
C
) is used for setting the size of the
C
228kHz
)
×
VID
×
X
R
×
1.5V
×
R
)
O
=


=
291kΩ
0.765V
GSF
= 31nC (max),
CC
times the
Ω
Current Limit Set Point
The per phase current limit described earlier has its limit
determined by the following:
I
This limit can be adjusted by changing the ramp voltage V
But make sure not to set the per-phase limit lower than the
average per-phase current (I
There is also a per phase initial duty cycle limit determined
by:
For this example, the maximum duty cycle is found to be
0.2696.
Feedback Loop Compensation Design
Optimized compensation of the FAN53168 allows the best
possible response of the regulator’s output to a load change.
The basis for determining the optimum compensation is to
make the regulator and output decoupling appear as an
output impedance that is entirely resistive over the widest
possible frequency range, including DC, and equal to the
droop resistance (R
the output voltage will droop in proportion with the load
current at any load current slew rate; this ensures the optimal
positioning and allows the minimization of the output
decoupling.
D
R
PHLIM
MAX
LIM
=
=
≅
A
------------------------------ -
V
---------------------------------------------------------------------
D
I
LIM
COMP MAX
LIM
×
V
------------------------------------------------------- -
×
×
A
COMP MAX
V
D
R
(
LIM
×
O
µ
O
R
(
). With the resistive output impedance,
Ω
)
DS MAX
V
–
RT
V
(
R
)
–
–
LIM
V
)
V
BIAS
BIAS
/n).
–
Ω
I
---- -
2
R
Ω
Ω
FAN53168
21
R
.