LT3751 LINER [Linear Technology], LT3751 Datasheet - Page 18

• Manufacturer Part Number: LT3751
• Description: Capacitor Charger Controller with Regulation
• Manufacturer: LINER [Linear Technology]

applicaTions inForMaTion
LT3751
with V
Applications section). Consult applications engineering
for applications with V
RV
may be removed for regulator applications. Note that the
V
for regulator applications. If the V
for protection, design V
the regulation voltage. Tie the RV
RV
R
Improper selection of R
operation at low output voltages. Use Table 2 to size R
Parasitic capacitance on RV
be minimized. Capacitances on these nodes slow down
the response times of the V
Keep the distance between the resistor and pin short. It
is recommended to remove all ground and power planes
underneath these pins and their respective components
(refer to the recommended board layout at the end of
this section).
R
R
to the selection of RV
with a trip current between 100µA and 2mA. Choosing
RV
Table 3. Recommended NMOS Transistors
MANUFACTURER
Fairchild Semiconductor
www.fairchildsemi.com
On Semiconductor
www.onsemi.com
Vishay
www.vishay.com
18
OUT
DCM
BG
BG
OUT
OUT
OUT
sets the trip current (0.98/R
Selection
comparator can be used as secondary protection
needs to be properly sized in relation to RV
TRANS
from Table 2 meets this criterion. Use the following
resistor is removed.
is required for capacitor charger applications but
between 100V and 400V (refer to Typical
OUT
PART NUMBER
FDS2582
FQB19N20L
FQP34N20L
FQD12N20L
FQB4N80
MTD6N15T4G
NTD12N10T4G
NTB30N20T4G
NTB52N10T4G
Si7820DN
Si7818DN
SUP33N20-60P
DCM
TRANS
OUT,TRIP
. The best accuracy is achieved
TRANS
can lead to undesired switching
OUT
operating above 400V.
BG
15% to 20% higher than
, RV
and DCM comparators.
OUT
OUT
) and is directly related
OUT
pin to ground when
comparator is used
, and R
I
D
4.1
3.9
2.6
3.4
DCM
21
31
12
12
30
52
33
6
(A)
should
TRANS
DCM
V
.
.
DS(MAX)
150
200
200
200
800
150
100
200
100
200
150
200
equation to size R
Tie R
tor. Consult applications engineering for calculating R
when operating V
NMOS Switch Selection
Choose an external NMOS power switch with minimal gate
charge and on-resistance that satisfies current limit and
voltage break-down requirements. The gate is nominally
driven to V
this does not exceed the maximum gate to source voltage
rating of the NMOS but enhances the channel enough to
minimize the on-resistance.
Similarly, the maximum drain-source voltage rating of the
NMOS must exceed V
the leakage inductance spike, whichever is greater. The
maximum instantaneous drain current rating must exceed
selected current limit. Because the switching period de-
creases with output voltage, the average current though
the NMOS is greatest when the output is nearly charged
and is given by:
See Table 3 for recommended external NMOS transistors.
(V)
I
R
AVG,M
BG
BG
= 0.98 •N •
pin to ground when not using the V
=
R
CC
DS(ON)
2(V
– 2V during each charge cycle. Ensure that
3600
140
280
300
165
240
135
66
75
81
30
60
OUT(PK)
(mΩ)
I
TRANS
BG
PK



• V
(V
V
TRANS
OUT,TRIP
TRANS
+ N • V
OUT(PK)
above 80V.
Q
RV
+ V
G(TOT)
≤ 80V):
TRANS
12.1
OUT
11
27
55
16
19
15
14
75
72
20
53
OUT
+ V
(nC)
/N or the magnitude of
DIODE
)



OUT
PACKAGE
TO-220
TO-220
1212-8
1212-8
D
D
D
D
DPAK
DPAK
DPAK
SO-8
2
2
2
2
compara-
PAK
PAK
PAK
PAK
3751fc
BG