LX1977IDU MICROSEMI [Microsemi Corporation], LX1977IDU Datasheet - Page 5

• Manufacturer Part Number: LX1977IDU
• Description: SMBus Ambient Light Sensor
• Manufacturer: MICROSEMI [Microsemi Corporation]

Copyright © 2010
Rev. 1.0, 2010-03-25
B
interface. It contains a high sensitivity close to human eye
response photodiode, a 12-bit Sigma-Delta ADC and a SMBus
interface. The Sigma-Delta ADC converts photodiode current to
digital values that correspond to the light incident on the
photodiode. The integrating nature of the ADC allows the device
to reject 50Hz and 60Hz flicker noise from environmental
lighting.
SMBus I
conversion times, or integration time. It has four conversion
time selections to meet different application requirements. The
clock source for the ADC is also selectable from either an
internal clock or a SMBus clock. For internal clock selection,
the device features full speed (40.96kHz) and quarter speed
(10.24kHz) selection. The ADC conversion result is stored in a
12-bit register for read back even when another conversion is in
process.
protocols to communicate with the host system. All registers
are defined as full byte wide. Some registers contain reserved
(undefined) bits with a default value of “0”, or are read only bits
that are status indicators. Six of the nine registers are capable of
both read and write, and three registers are read only. See the
LX1977 Register Definitions section for details.
a “slave” mode receiving commands and sending / receiving
data to / from the host or “master”. Only standard two-wire
SMBus and I
used for this device. The LX1977 can be configured for one of
the three addresses by connecting the ADR input pin to ground,
V
ASIC
DD,
The LX1977 is an ALS with an I
The Sigma-Delta ADC provides the flexibility to set different
LX1977 is a nine-register device which uses SMBus or I
The LX1977 communicates over the SMBus and operates in
or simply leaving it OPEN.
F
UNCTIONALITY
NTERFACE
Option #
TM
1
2
3
2
Table 1: Address strapping codes
C compatible serial bus and protocols may be
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: [phone]
OPEN
ADR
GND
V
DD
2
C compatible SMBus
Hex Address
20h
22h
70h
A P P L I C A T I O N N O T E
Analog Mixed Signal Group
®
Microsemi
2
C
full 8 bit address. The high nibble of the address is from bit 7 to
bit 4. In the low nibble, bit 0 is always the R/W bit and in 8 bit
address format it is considered 0.
that after the change, the LX1977 ALS should be disabled and
then enabled either via bit 6 of register 00h or a V
SMBus P
Receive Byte, Read Byte / Word, and the Write Byte / Word
protocols. See Table 7 ~ Table 12 for details.
address selection pin input to determine its own address and then
look for its unique address each time it detects a “Start
Condition”. If the address does not match, the LX1977 ignores
all bus activity until it encounters another “Start Condition”. If
the address is a match, the LX1977 acknowledges that it has
detected its address and a W/R bit to either read or write. If the
Write Byte / Word protocols and / or by internal IC logic,
depending on the register type (see Table 13).
protocol can only be used on the Command / Status register
(register 00h).
Byte / Word protocol. Note that Receive Byte protocol can only
be used on the Command / Status register (register 00h) for a
quick test of the status bits. Read Only registers can be written
only by internal logics. Their contents will not be affected by
SMBus write commands.
The address could be changed dynamically. The requirement is
In this document, the device address is always expressed as
The only required command protocols are SMBus Send Byte,
When LX1977 is initially powered, it will first test the
Writes to registers can be performed by either the SMBus
Read can be performed on all registers by issuing the Read
1
S
1
S
1
S
SMBus Ambient Light Sensor
Slave Address
Slave Address
Slave Address
ROTOCOL
0 0 1 0 0 0 0
0 0 1 0 0 0 1
0 1 1 1 0 0 0
7
7
7
P
RODUCTION
Table 2: Address = 20h
Table 3: Address = 22h
Table 4: Address = 70h
Wr
Wr
Wr
1
0
1
0
1
0
D
A
A
A
1
1
1
ATASHEET
Data Byte
Data Byte
Data Byte
8
8
8
DD
LX1977
power cycle.
Send Byte
A
A
A
1
1
1
Page 5
P
P
P
1
1
1