EL7556AC ELANTEC [Elantec Semiconductor], EL7556AC Datasheet - Page 10

• Manufacturer Part Number: EL7556AC
• Description: Programmable CPU Power Supply Unit
• Manufacturer: ELANTEC [Elantec Semiconductor]

EL7556AC
Programmable CPU Power Supply Unit
Applications Information
Circuit Description
General
The EL7556AC is a fixed frequency, current mode con-
trolled DC:DC converter with integrated N-channel
power MOSFETS and a high precision reference. The
device incorporates all of the active circuitry required to
implement a cost effective, user-programmable 6A syn-
chronous buck converter suitable for use in CPU power
supplies. By combining fused-lead packaging technol-
o g y w i t h a n e f f i c i e n t s y n c hr o n ou s s w i t c h i ng
architecture, high power outputs (21W) can be realized
without the use of discrete external heat sinks.
Theory of Operation
The EL7556AC is composed of 7 major blocks:
1. PWM Controller
2. Output Voltage Mode Select
3. NMOS Power FETS and Drive Circuitry
4. Bandgap Reference
5. Oscillator
6. Temperature Sensor
7. Power Good and Power On Reset
PWM Controller
The EL7556AC regulates output voltage through the use
of current-mode controlled pulse width modulation. The
three main elements in a PWM controller are the feed-
back loop and reference, a pulse width modulator whose
duty cycle is controlled by the feedback error signal, and
a filter which averages the logic level modulator output.
In a step-down (buck) converter, the feedback loop
forces the time-averaged output of the modulator to
equal the desired output voltage. Unlike pure voltage-
mode control systems current-mode control utilizes dual
feedback loops to provide both output voltage and
inductor current information to the controller. The volt-
age loop minimizes DC and transient errors in the output
voltage by adjusting the PWM duty-cycle in response to
changes in line or load conditions. Since the output volt-
age is equal to the time-average of the modulator output
10
the relatively large LC time constants found in power
supply applications generally results in low bandwidth
and poor transient response. By directly monitoring
changes in inductor current via a series sense resistor the
controller’s response time is not entirely limited by the
output LC filter and can react more quickly to changes in
line or load conditions. This feed-forward characteristic
also simplifies AC loop compensation since it adds a
zero to the overall loop response. Through proper selec-
tion of the current-feedback to voltage-feedback ratio,
the overall loop response will approach a one pole sys-
tem. The resulting system offers several advantages over
traditional voltage control systems, including simpler
loop compensation, pulse by pulse current limiting,
rapid response to line variation and good load step
response.
The heart of the controller is a triple-input direct sum-
ming comparator which sums voltage feedback, current
feedback and slope compensating ramp signals together.
Slope compensation is required to prevent system insta-
bility which occurs in current-mode topologies
operating at duty-cycles greater than 50% and is also
used to define the open-loop gain of the overall system.
The compensation ramp amplitude is user adjustable and
is set using a single external capacitor (CSLOPE). Each
comparator input is weighted and determines the load
and line regulation characteristics of the system. Current
feedback is measured by sensing the inductor current
flowing through the high-side switch whenever it is con-
ducting. At the beginning of each oscillator period the
high-side NMOS switch is turned on and CSLOPE
ramps positively from its reset state (VREF potential).
The comparator inputs are gated off for a minimum
period of time (LEB) after the high-side switch is turned
on to allow the system to settle. The Leading Edge
Blanking (LEB) period prevents the detection of errone-
ous voltages at the comparator inputs due to switching
noise. When programming low regulator output voltages
the LEB delay will limit the maximum operating fre-
quency of the circuit since the LEB will result in a
minimum duty-cycle regardless of the PWM error volt-
age. This relationship is shown in the performance
curves. If the inductor current exceeds the maximum
current limit (I LMAX ), a secondary over-current com-