ADP1876-EVALZ AD [Analog Devices], ADP1876-EVALZ Datasheet - Page 20

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ADP1876-EVALZ

Manufacturer Part Number
ADP1876-EVALZ
Description
600 kHz Dual Output Synchronous Buck
Manufacturer
AD [Analog Devices]
Datasheets
Usually, the impedance is dominated by ESR, such as in
electrolytic or polymer capacitors, at the switching frequency, as
stated in the maximum ESR rating on the capacitor data sheet;
therefore, output ripple reduces to
Electrolytic capacitors also have significant ESL, on the order
of 5 nH to 20 nH, depending on type, size, and geometry. PCB
traces contribute some ESR and ESL, as well. However, using
the maximum ESR rating from the capacitor data sheet often
provides enough margin such that measuring the ESL is not
usually required.
In the case of output capacitors where the impedance of the ESR
and ESL are small at the switching frequency, for instance, where
the output capacitor is a bank of parallel MLCC capacitors, the
capacitive impedance dominates and the output capacitance
equation reduces to
Ensure that the ripple current rating of the output capacitors is
greater than the maximum inductor ripple current.
For example, during a load step transient on the output, when
the load is suddenly increased, the output capacitor supplies the
load until the control loop has a chance to ramp the inductor
current. This initial output voltage deviation results in a voltage
droop or undershoot. The output capacitance (assuming 0 Ω
ESR) that is required to satisfy the voltage droop requirement
can be approximated by
where:
∆I
∆V
When a load is suddenly removed from the output, the energy
stored in the inductor rushes into the capacitor, causing the
output to overshoot. The output capacitance required to satisfy
the output overshoot requirement can be approximated by
where:
∆V
Select the largest output capacitance given by any of the
previous three equations.
MOSFET SELECTION
The choice of MOSFET directly affects the dc-to-dc converter
performance. A MOSFET with low on resistance reduces I
losses, and a low gate charge reduces transition losses. A MOSFET
that has low thermal resistance ensures that the power dissipated
in the MOSFET does not result in excessive MOSFET die tem-
perature.
ADP1876
STEP
DROOP
OVERSHOOT
C
C
C
is the step load.
V
OUT
OUT
OUT
OUT
is the voltage droop at the output.
is the overshoot voltage during the step load.
8
(
V
V
I
OUT
V
L
DROOP
OUT
×
I
+
I
STEP
R
L
ESR
×
×
V
f
OVERSHOOT
SW
f
SW
I
STEP
2
L
)
2
V
OUT
2
2
R
Rev. A | Page 20 of 24
The high-side MOSFET carries the load current during on time
and usually carries most of the transition losses of the converter.
Typically, the lower the on resistance of the MOSFET, the higher
the gate charge, and vice versa. Therefore, it is important to
choose a high-side MOSFET that balances the two losses. The
conduction loss of the high-side MOSFET is determined by the
equation
where:
R
The gate charging loss is approximated by the equation
where
V
Q
Note that the gate charging power loss is not dissipated in the
MOSFET but rather in the
power loss must be considered when calculating the overall
power efficiency.
The high-side MOSFET transition loss is approximated by the
equation
where:
P
t
t
t
where:
Q
given in the MOSFET data sheet.
I
ADP1876
If Q
where Q
charges given in the MOSFET data sheet.
I
R
F
R
DRIVER_RISE
DRIVER_RISE
T
DSON
PV
G
GSW
is the fall time in discharging the high-side MOSFET.
is the rise time in charging the high-side MOSFET.
and t
is the high-side MOSFET switching loss power.
is the MOSFET total gate charge.
GSW
is the gate driver supply voltage.
P
Q
t
t
P
P
I
is the gate charge of the MOSFET during switching and is
is the MOSFET on resistance.
G
R
F
T
DRIVER
C
GSW
F
is not given in the data sheet, it can be approximated by
≅ V
GD
can be estimated by the following equations:
I
I
and I
(
internal gate drivers.
and I
V
DRIVER
DRIVER
and Q
I
Q
_
LOAD
PV
IN
Q
Q
RISE
GD
GSW
GSW
× Q
×
DRIVER_FALL
DRIVER_FALL
+
_
_
)
I
FALL
GS
RISE
2
Q
LOAD
G
2
×
GS
are the gate-to-drain and gate-to-source
R
× f
R
ON
DSON
SW
×
_
V
are the driver current output by the
(
2
can be estimated by
SOURCE
t
DD
R
ADP1876
V
+
V
OUT
t
V
IN
F
+
SP
)
R
×
GATE
f
internal drivers. This
SW
Data Sheet

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